[PATCH 12/43] drm: allow CAIRO_FORMAT_RGB30

"Enrico Weigelt, metux IT consult" <[email protected]>
Newsgroups gmane.comp.lib.cairo
Message-ID <[email protected]> 
Signed-off-by: Enrico Weigelt, metux IT consult <[email protected]>
---
 src/drm/cairo-drm-i915-surface.c   | 9 +++++++++
 src/drm/cairo-drm-i965-surface.c   | 2 ++
 src/drm/cairo-drm-intel-surface.c  | 1 +
 src/drm/cairo-drm-intel.c          | 4 ++++
 src/drm/cairo-drm-radeon-surface.c | 2 ++
 5 files changed, 18 insertions(+)

diff --git a/src/drm/cairo-drm-i915-surface.c b/src/drm/cairo-drm-i915-surface.c
index 766b78b..68822c0 100644
--- a/src/drm/cairo-drm-i915-surface.c
+++ b/src/drm/cairo-drm-i915-surface.c
@@ -1077,6 +1077,7 @@ i915_blt (i915_surface_t *src,
 	break;
     case CAIRO_FORMAT_RGB24:
     case CAIRO_FORMAT_ARGB32:
+    case CAIRO_FORMAT_RGB30:
 	br13 |= BR13_8888;
 	cmd |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 	break;
@@ -1158,6 +1159,7 @@ i915_clear_boxes (i915_surface_t *dst,
     case CAIRO_FORMAT_RGB24:
 	clear = 0xff000000;
     case CAIRO_FORMAT_ARGB32:
+    case CAIRO_FORMAT_RGB30:
 	br13 |= BR13_8888;
 	cmd |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 	break;
@@ -1354,6 +1356,7 @@ i915_blt_boxes (i915_surface_t *dst,
 	break;
     case CAIRO_FORMAT_RGB24:
     case CAIRO_FORMAT_ARGB32:
+    case CAIRO_FORMAT_RGB30:
 	br13 |= BR13_8888;
 	cmd |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 	break;
@@ -1698,6 +1701,7 @@ i915_surface_clear (i915_surface_t *dst)
 	case CAIRO_FORMAT_RGB24:
 	    clear = 0xff000000;
 	case CAIRO_FORMAT_ARGB32:
+	case CAIRO_FORMAT_RGB30:
 	    br13 |= BR13_8888;
 	    cmd |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 	    break;
@@ -2393,6 +2397,7 @@ i915_surface_init (i915_surface_t *surface,
     case CAIRO_FORMAT_A1:
 	ASSERT_NOT_REACHED;
     case CAIRO_FORMAT_ARGB32:
+    case CAIRO_FORMAT_RGB30:
 	surface->map0 = MAPSURF_32BIT | MT_32BIT_ARGB8888;
 	surface->colorbuf = COLR_BUF_ARGB8888 | DEPTH_FRMT_24_FIXED_8_OTHER;
 	break;
@@ -2504,6 +2509,7 @@ i915_surface_create (cairo_drm_device_t *base_dev,
     case CAIRO_FORMAT_RGB16_565:
     case CAIRO_FORMAT_RGB24:
     case CAIRO_FORMAT_A8:
+    case CAIRO_FORMAT_RGB30:
 	break;
     case CAIRO_FORMAT_INVALID:
     default:
@@ -2539,6 +2545,7 @@ i915_surface_create_for_name (cairo_drm_device_t *base_dev,
     case CAIRO_FORMAT_ARGB32:
     case CAIRO_FORMAT_RGB16_565:
     case CAIRO_FORMAT_RGB24:
+    case CAIRO_FORMAT_RGB30:
     case CAIRO_FORMAT_A8:
 	break;
     }
@@ -2588,6 +2595,7 @@ i915_buffer_cache_init (intel_buffer_cache_t *cache,
     case CAIRO_FORMAT_RGB24:
     case CAIRO_FORMAT_RGB16_565:
 	ASSERT_NOT_REACHED;
+    case CAIRO_FORMAT_RGB30:
     case CAIRO_FORMAT_ARGB32:
 	cache->buffer.map0 = MAPSURF_32BIT | MT_32BIT_ARGB8888;
 	stride = width * 4;
@@ -2670,6 +2678,7 @@ i915_surface_create_from_cacheable_image_internal (i915_device_t *device,
     case CAIRO_FORMAT_ARGB32:
     case CAIRO_FORMAT_RGB24:
     case CAIRO_FORMAT_RGB16_565:
+    case CAIRO_FORMAT_RGB30:
 	caches = &device->image_caches[0];
 	format = CAIRO_FORMAT_ARGB32;
 	bpp = 4;
diff --git a/src/drm/cairo-drm-i965-surface.c b/src/drm/cairo-drm-i965-surface.c
index 42a9ef0..0938d64 100644
--- a/src/drm/cairo-drm-i965-surface.c
+++ b/src/drm/cairo-drm-i965-surface.c
@@ -1616,6 +1616,7 @@ i965_surface_create (cairo_drm_device_t *device,
     case CAIRO_FORMAT_ARGB32:
     case CAIRO_FORMAT_RGB16_565:
     case CAIRO_FORMAT_RGB24:
+    case CAIRO_FORMAT_RGB30:
     case CAIRO_FORMAT_A8:
 	break;
     case CAIRO_FORMAT_INVALID:
@@ -1650,6 +1651,7 @@ i965_surface_create_for_name (cairo_drm_device_t *base_dev,
     case CAIRO_FORMAT_ARGB32:
     case CAIRO_FORMAT_RGB16_565:
     case CAIRO_FORMAT_RGB24:
+    case CAIRO_FORMAT_RGB30:
     case CAIRO_FORMAT_A8:
 	break;
     case CAIRO_FORMAT_INVALID:
diff --git a/src/drm/cairo-drm-intel-surface.c b/src/drm/cairo-drm-intel-surface.c
index 7371785..6d90225 100644
--- a/src/drm/cairo-drm-intel-surface.c
+++ b/src/drm/cairo-drm-intel-surface.c
@@ -355,6 +355,7 @@ intel_surface_create_for_name (cairo_drm_device_t *device,
     case CAIRO_FORMAT_ARGB32:
     case CAIRO_FORMAT_RGB16_565:
     case CAIRO_FORMAT_RGB24:
+    case CAIRO_FORMAT_RGB30:
     case CAIRO_FORMAT_A8:
 	break;
     }
diff --git a/src/drm/cairo-drm-intel.c b/src/drm/cairo-drm-intel.c
index ac622fa..42abc0b 100644
--- a/src/drm/cairo-drm-intel.c
+++ b/src/drm/cairo-drm-intel.c
@@ -672,6 +672,7 @@ intel_bo_put_image (intel_device_t *device,
     switch (src->format) {
     case CAIRO_FORMAT_ARGB32:
     case CAIRO_FORMAT_RGB24:
+    case CAIRO_FORMAT_RGB30:
 	offset += 4 * dst_x;
 	data   += 4 * src_x;
 	size    = 4 * width;
@@ -920,6 +921,7 @@ intel_glyph_cache_add_glyph (intel_device_t *device,
 	break;
 
     case CAIRO_FORMAT_ARGB32:
+    case CAIRO_FORMAT_RGB30:
 	dst  += 4*node->x;
 	width = 4*glyph_surface->width;
 	while (height--) {
@@ -992,6 +994,7 @@ intel_get_glyph_cache (intel_device_t *device,
 
     switch (format) {
     case CAIRO_FORMAT_ARGB32:
+    case CAIRO_FORMAT_RGB30:
 	cache = &device->glyph_cache[0];
 	format = CAIRO_FORMAT_ARGB32;
 	break;
@@ -1124,6 +1127,7 @@ intel_buffer_cache_init (intel_buffer_cache_t *cache,
 	ASSERT_NOT_REACHED;
 	return _cairo_error (CAIRO_STATUS_INVALID_FORMAT);
     case CAIRO_FORMAT_ARGB32:
+    case CAIRO_FORMAT_RGB30:
 	cache->buffer.map0 = MAPSURF_32BIT | MT_32BIT_ARGB8888;
 	stride = width * 4;
 	break;
diff --git a/src/drm/cairo-drm-radeon-surface.c b/src/drm/cairo-drm-radeon-surface.c
index 3451e58..da06a32 100644
--- a/src/drm/cairo-drm-radeon-surface.c
+++ b/src/drm/cairo-drm-radeon-surface.c
@@ -348,6 +348,7 @@ radeon_surface_create (cairo_drm_device_t *device,
     case CAIRO_FORMAT_RGB16_565:
 	return _cairo_surface_create_in_error (_cairo_error (CAIRO_STATUS_INVALID_FORMAT));
     case CAIRO_FORMAT_ARGB32:
+    case CAIRO_FORMAT_RGB30:
     case CAIRO_FORMAT_RGB24:
     case CAIRO_FORMAT_A8:
 	break;
@@ -372,6 +373,7 @@ radeon_surface_create_for_name (cairo_drm_device_t *device,
     case CAIRO_FORMAT_RGB16_565:
 	return _cairo_surface_create_in_error (_cairo_error (CAIRO_STATUS_INVALID_FORMAT));
     case CAIRO_FORMAT_ARGB32:
+    case CAIRO_FORMAT_RGB30:
     case CAIRO_FORMAT_RGB24:
     case CAIRO_FORMAT_A8:
 	break;
-- 
2.6.4.442.g545299f

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