[PATCH] x86: Update AVX10 support

From 8f147be0e60df257fa28bba772080e36cd8f52ad Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <[email protected]>
Date: Fri, 21 Aug 2026 08:02:26 +0800
Subject: [PATCH] x86: Update AVX10 support

Update AVX10 support for Intel AVX10 specification published in June 2026:

https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html

and AI Compute Extensions (ACE) Specification:

https://x86ecosystem.org/resource/ai-compute-extensions-ace-specification/

1. Add x86_get_avx10_version to return AVX10 version.
2. Detect AVX10_V1_AUX and AVX10_V2_AUX features.
3. Remove AVX10_XMM, AVX10_YMM, AVX10_ZMM documentations.
4. Move CPUID_INDEX_MAX to <bits/platform/x86.h>.

This fixes BZ #34554.

Signed-off-by: H.J. Lu <[email protected]>
---
 manual/platform.texi               | 13 ++++++----
 sysdeps/x86/bits/platform/x86.h    | 18 +++++++++++---
 sysdeps/x86/cpu-features.c         | 39 ++++++++++++++++++++----------
 sysdeps/x86/include/cpu-features.h | 31 ++++++++++++++++++------
 sysdeps/x86/sys/platform/x86.h     | 19 +++++++++++++++
 sysdeps/x86/tst-get-cpu-features.c |  9 +++++++
 6 files changed, 99 insertions(+), 30 deletions(-)

diff --git a/manual/platform.texi b/manual/platform.texi
index 478b6fdcdf..cb89e4432d 100644
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -148,6 +148,11 @@ Return a pointer to x86 CPU feature structure used by query macros for x86
 CPU feature @var{leaf}.
 @end deftypefun
 
+@deftypefun {unsigned int} x86_get_avx10_version (void)
+@safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}}
+Return AVX10 version.  Return 0 if AVX10 isn't available.
+@end deftypefun
+
 @deftypefn Macro int CPU_FEATURE_PRESENT (@var{name})
 This macro returns a nonzero value (true) if the processor has the feature
 @var{name}.
@@ -226,13 +231,11 @@ Leaf (EAX = 23H).
 @code{AVX10} -- The AVX10 instruction extensions.
 
 @item
-@code{AVX10_XMM} -- Whether AVX10 includes xmm registers.
+@code{AVX10_V1_AUX} -- AVX10.2 convert instruction extensions.
 
 @item
-@code{AVX10_YMM} -- Whether AVX10 includes ymm registers.
-
-@item
-@code{AVX10_ZMM} -- Whether AVX10 includes zmm registers.
+@code{AVX10_V2_AUX} -- AVX10.2 integer and FP16 VNNI, Media instruction
+extensions.
 
 @item
 @code{AVX2} -- The AVX2 instruction extensions.
diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h
index 999b60eaf0..e352bb7ab1 100644
--- a/sysdeps/x86/bits/platform/x86.h
+++ b/sysdeps/x86/bits/platform/x86.h
@@ -31,7 +31,9 @@ enum
   CPUID_INDEX_7_ECX_1,
   CPUID_INDEX_19,
   CPUID_INDEX_14_ECX_0,
-  CPUID_INDEX_24_ECX_0
+  CPUID_INDEX_24_ECX_0,
+  CPUID_INDEX_24_ECX_1,
+  CPUID_INDEX_MAX
 };
 
 struct cpuid_feature
@@ -333,7 +335,15 @@ enum
     = (CPUID_INDEX_24_ECX_0 * 8 * 4 * sizeof (unsigned int)
        + cpuid_register_index_ebx * 8 * sizeof (unsigned int)),
 
-  x86_cpu_AVX10_XMM = x86_cpu_index_24_ecx_0_ebx + 16,
-  x86_cpu_AVX10_YMM = x86_cpu_index_24_ecx_0_ebx + 17,
-  x86_cpu_AVX10_ZMM = x86_cpu_index_24_ecx_0_ebx + 18,
+  x86_cpu_AVX10_VERSION		= x86_cpu_index_24_ecx_0_ebx,
+  x86_cpu_AVX10_XMM		= x86_cpu_index_24_ecx_0_ebx + 16,
+  x86_cpu_AVX10_YMM		= x86_cpu_index_24_ecx_0_ebx + 17,
+  x86_cpu_AVX10_ZMM		= x86_cpu_index_24_ecx_0_ebx + 18,
+
+  x86_cpu_index_24_ecx_1_ecx
+    = (CPUID_INDEX_24_ECX_1 * 8 * 4 * sizeof (unsigned int)
+       + cpuid_register_index_ecx * 8 * sizeof (unsigned int)),
+
+  x86_cpu_AVX10_V1_AUX		= x86_cpu_index_24_ecx_1_ecx + 2,
+  x86_cpu_AVX10_V2_AUX		= x86_cpu_index_24_ecx_1_ecx + 3,
 };
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 0db33e0f35..ecbcb3c78b 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -259,20 +259,33 @@ update_active (struct cpu_features *cpu_features)
 	    }
 	}
 
-      if (CPU_FEATURES_CPU_P (cpu_features, AVX10)
-	  && cpu_features->basic.max_cpuid >= 0x24)
+      if (cpu_features->basic.max_cpuid >= 0x24)
 	{
-	  __cpuid_count (
-	      0x24, 0, cpu_features->features[CPUID_INDEX_24_ECX_0].cpuid.eax,
-	      cpu_features->features[CPUID_INDEX_24_ECX_0].cpuid.ebx,
-	      cpu_features->features[CPUID_INDEX_24_ECX_0].cpuid.ecx,
-	      cpu_features->features[CPUID_INDEX_24_ECX_0].cpuid.edx);
-	  if (os_vector_size & os_xmm)
-	    CPU_FEATURE_SET_ACTIVE (cpu_features, AVX10_XMM);
-	  if (os_vector_size & os_ymm)
-	    CPU_FEATURE_SET_ACTIVE (cpu_features, AVX10_YMM);
-	  if (os_vector_size & os_zmm)
-	    CPU_FEATURE_SET_ACTIVE (cpu_features, AVX10_ZMM);
+	  __cpuid_count
+	    (0x24, 0,
+	     cpu_features->features[CPUID_INDEX_24_ECX_0].cpuid.eax,
+	     cpu_features->features[CPUID_INDEX_24_ECX_0].cpuid.ebx,
+	     cpu_features->features[CPUID_INDEX_24_ECX_0].cpuid.ecx,
+	     cpu_features->features[CPUID_INDEX_24_ECX_0].cpuid.edx);
+
+	  if (cpu_features->features[CPUID_INDEX_24_ECX_0].cpuid.eax != 0)
+	    __cpuid_count
+	      (0x24, 1,
+	       cpu_features->features[CPUID_INDEX_24_ECX_1].cpuid.eax,
+	       cpu_features->features[CPUID_INDEX_24_ECX_1].cpuid.ebx,
+	       cpu_features->features[CPUID_INDEX_24_ECX_1].cpuid.ecx,
+	       cpu_features->features[CPUID_INDEX_24_ECX_1].cpuid.edx);
+
+	  if (CPU_FEATURES_CPU_P (cpu_features, AVX10))
+	    {
+	      CPU_FEATURE_SET_ACTIVE (cpu_features, AVX10_VERSION);
+	      if (os_vector_size & os_xmm)
+		CPU_FEATURE_SET_ACTIVE (cpu_features, AVX10_XMM);
+	      if (os_vector_size & os_ymm)
+		CPU_FEATURE_SET_ACTIVE (cpu_features, AVX10_YMM);
+	      if (os_vector_size & os_zmm)
+		CPU_FEATURE_SET_ACTIVE (cpu_features, AVX10_ZMM);
+	    }
 	}
 
       /* Are XTILECFG and XTILEDATA states usable?  */
diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h
index c1ef3911ab..b8e39439c8 100644
--- a/sysdeps/x86/include/cpu-features.h
+++ b/sysdeps/x86/include/cpu-features.h
@@ -27,11 +27,6 @@
 #define _SYS_PLATFORM_X86_H
 #include <bits/platform/x86.h>
 
-enum
-{
-  CPUID_INDEX_MAX = CPUID_INDEX_24_ECX_0 + 1
-};
-
 enum
 {
   /* The integer bit array index for the first set of preferred feature
@@ -337,9 +332,16 @@ enum
 /* CPUID_INDEX_24_ECX_0.  */
 
 /* EBX.  */
-#define bit_cpu_AVX10_XMM		(1u << 16)
-#define bit_cpu_AVX10_YMM		(1u << 17)
-#define bit_cpu_AVX10_ZMM		(1u << 18)
+#define bit_cpu_AVX10_VERSION	0xff		/* Bits 0-7.  */
+#define bit_cpu_AVX10_XMM	(1u << 16)
+#define bit_cpu_AVX10_YMM	(1u << 17)
+#define bit_cpu_AVX10_ZMM	(1u << 18)
+
+/* CPUID_INDEX_24_ECX_1.  */
+
+/* ECX.  */
+#define bit_cpu_AVX10_V1_AUX	(1u << 2)
+#define bit_cpu_AVX10_V2_AUX	(1u << 3)
 
 /* CPUID_INDEX_1.  */
 
@@ -592,10 +594,17 @@ enum
 /* CPUID_INDEX_24_ECX_0.  */
 
 /* EBX.  */
+#define index_cpu_AVX10_VERSION	CPUID_INDEX_24_ECX_0
 #define index_cpu_AVX10_XMM	CPUID_INDEX_24_ECX_0
 #define index_cpu_AVX10_YMM	CPUID_INDEX_24_ECX_0
 #define index_cpu_AVX10_ZMM	CPUID_INDEX_24_ECX_0
 
+/* CPUID_INDEX_24_ECX_1.  */
+
+/* ECX.  */
+#define index_AVX10_V1_AUX	CPUID_INDEX_24_ECX_1
+#define index_AVX10_V2_AUX	CPUID_INDEX_24_ECX_1
+
 /* CPUID_INDEX_1.  */
 
 /* ECX.  */
@@ -847,10 +856,16 @@ enum
 /* CPUID_INDEX_24_ECX_0.  */
 
 /* EBX.  */
+#define reg_AVX10_VERSION	ebx
 #define reg_AVX10_XMM		ebx
 #define reg_AVX10_YMM		ebx
 #define reg_AVX10_ZMM		ebx
 
+/* CPUID_INDEX_24_ECX_1.  */
+
+/* ECX.  */
+#define reg_AVX10_V1_AUX	ecx
+#define reg_AVX10_V2_AUX	ecx
 
 /* PREFERRED_FEATURE_INDEX_1.  First define the bitindex values
    sequentially, then define the bit_arch* and index_arch_* lookup
diff --git a/sysdeps/x86/sys/platform/x86.h b/sysdeps/x86/sys/platform/x86.h
index 7df22135ce..eb2fe1e35d 100644
--- a/sysdeps/x86/sys/platform/x86.h
+++ b/sysdeps/x86/sys/platform/x86.h
@@ -59,6 +59,25 @@ x86_cpu_active (unsigned int __index)
   return __ptr->active_array[__reg] & (1 << __bit);
 }
 
+static __inline__ unsigned int
+x86_get_avx10_version (void)
+{
+  if (x86_cpu_active (x86_cpu_AVX10))
+    {
+      unsigned int __index = x86_cpu_AVX10_VERSION;
+      const struct cpuid_feature *__ptr = __x86_get_cpuid_feature_leaf
+	(__index / (8 * sizeof (unsigned int) * 4));
+      unsigned int __reg = __index & (8 * sizeof (unsigned int) * 4 - 1);
+      __reg /= 8 * sizeof (unsigned int);
+
+      /* Bits 0-7 are AVX10_VERSION.  */
+      return __ptr->active_array[__reg] & 0xff;
+    }
+
+  /* Return 0 to indicate that AVX10 isn't available.  */
+  return 0;
+}
+
 /* CPU_FEATURE_PRESENT evaluates to true if CPU supports the feature.  */
 #define CPU_FEATURE_PRESENT(name) x86_cpu_present (x86_cpu_##name)
 /* CPU_FEATURE_ACTIVE evaluates to true if the feature is active.  */
diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
index d879c76ed2..c6af1793fe 100644
--- a/sysdeps/x86/tst-get-cpu-features.c
+++ b/sysdeps/x86/tst-get-cpu-features.c
@@ -398,8 +398,17 @@ do_test (void)
   CHECK_CPU_FEATURE_ACTIVE (WIDE_KL);
   CHECK_CPU_FEATURE_ACTIVE (PTWRITE);
 
+  unsigned int version = x86_get_avx10_version ();
+  printf ("AVX10 version: %d\n", version);
+
   if (CPU_FEATURE_ACTIVE (AVX10))
     {
+      CHECK_CPU_FEATURE_ACTIVE (AVX10_V1_AUX);
+      CHECK_CPU_FEATURE_ACTIVE (AVX10_V2_AUX);
+
+      /* NB: These were from the earlier version of AVX10 specification.
+	 All processors supporting Intel® AVX10 will include support for
+	 all vector lengths.  */
       CHECK_CPU_FEATURE_ACTIVE (AVX10_XMM);
       CHECK_CPU_FEATURE_ACTIVE (AVX10_YMM);
       CHECK_CPU_FEATURE_ACTIVE (AVX10_ZMM);
-- 
2.55.0