[glibc] x86: Enable Prefer_No_AVX512 for Hygon model 0x8
Adhemerval Zanella via Glibc-cvs <[email protected]>
| Newsgroups | gmane.comp.lib.glibc.cvs |
|---|---|
| Message-ID | <[email protected]> |
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=efb343f3311dfc941d08b136e7b1282684742310 commit efb343f3311dfc941d08b136e7b1282684742310 Author: xiejiamei <[email protected]> Date: Wed Apr 29 08:20:30 2026 +0000 x86: Enable Prefer_No_AVX512 for Hygon model 0x8 Extend the Prefer_No_AVX512 tuning to cover Hygon model 0x8. Benchmarks on Hygon platforms show that EVEX implementations are often more profitable than AVX512 paths. The existing logic already enables Prefer_No_AVX512 for model 0x7. Apply the same preference to model 0x8 to ensure consistent IFUNC selection behavior across newer Hygon processors. Signed-off-by: xiejiamei <[email protected]> Reviewed-by: H.J. Lu <[email protected]> Diff: --- sysdeps/x86/cpu-features.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 73ee4f2bb8..a453136827 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -1135,7 +1135,7 @@ disable_tsx: cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load] &= ~bit_arch_AVX_Fast_Unaligned_Load; } - else if (model == 0x7) + else if (model == 0x7 || model == 0x8) { /* Benchmarks indicate evex can be more profitable on Hygon hardware than AVX512. */