[PATCH] Replace insns in ARMv6-M setjmp impl with flag-setting variants

In the ARMv6-M Thumb instruction set the MOV, ADD and SUB instructions
don't support flag-preserving variants for their 8-bit immediate
forms.
---
 newlib/libc/machine/arm/setjmp.S | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/newlib/libc/machine/arm/setjmp.S b/newlib/libc/machine/arm/setjmp.S
index 1ba711d5..b8511779 100644
--- a/newlib/libc/machine/arm/setjmp.S
+++ b/newlib/libc/machine/arm/setjmp.S
@@ -74,11 +74,11 @@ SYM (setjmp):
 	mov	r5, sp
 	mov	r6, lr
 	stmia	r0!, {r1, r2, r3, r4, r5, r6}
-	sub	r0, r0, #40
+	subs	r0, r0, #40
 	/* Restore callee-saved low regs.  */
 	ldmia	r0!, {r4, r5, r6, r7}
 	/* Return zero.  */
-	mov	r0, #0
+	movs	r0, #0
 	bx lr
 
 .thumb_func
@@ -86,7 +86,7 @@ SYM (setjmp):
 	TYPE (longjmp)
 SYM (longjmp):
 	/* Restore High regs.  */
-	add	r0, r0, #16
+	adds	r0, r0, #16
 	ldmia	r0!, {r2, r3, r4, r5, r6}
 	mov	r8, r2
 	mov	r9, r3
@@ -95,12 +95,12 @@ SYM (longjmp):
 	mov	sp, r6
 	ldmia	r0!, {r3} /* lr */
 	/* Restore low regs.  */
-	sub	r0, r0, #40
+	subs	r0, r0, #40
 	ldmia	r0!, {r4, r5, r6, r7}
 	/* Return the result argument, or 1 if it is zero.  */
 	mov	r0, r1
 	bne	1f
-	mov	r0, #1
+	movs	r0, #1
 1:
 	bx	r3
 
-- 
2.23.0