Re: AArch64 ILP32 strcmp bug

Keith Packard via Newlib <[email protected]>
Newsgroups gmane.comp.lib.newlib
Message-ID <[email protected]>
Joel Sherrill via Newlib <[email protected]> writes:

> In the meantime, would you think a patch to disable the optimized
> method when ilp32 is appropriate for newlib? There is still the risk of
> other methods having bugs. The alternative I see is to completely
> PREFER_SIZE_OVER_SPEED for aarch64 and disable all of the
> aarch64 assembly which seems worse.

There's also setjmp/longjmp, which are only available in assembly form.

Here's a completely untested patch (I'm afraid I don't have an ilp32
aarch64 compiler available today) which may help with that:

diff --git a/newlib/libc/machine/aarch64/setjmp.S b/newlib/libc/machine/aarch64/setjmp.S
index 0856145bf..df94eebd1 100644
--- a/newlib/libc/machine/aarch64/setjmp.S
+++ b/newlib/libc/machine/aarch64/setjmp.S
@@ -45,6 +45,9 @@
 	.global	setjmp
 	.type	setjmp, %function
 setjmp:
+#ifndef __LP64__
+	mov	w0, w0
+#endif
 	mov	x16, sp
 #define REG_PAIR(REG1, REG2, OFFS)	stp REG1, REG2, [x0, OFFS]
 #define REG_ONE(REG1, OFFS)		str REG1, [x0, OFFS]
@@ -60,6 +63,10 @@ setjmp:
 	.global	longjmp
 	.type	longjmp, %function
 longjmp:
+#ifndef __LP64__
+	mov	w0, w0
+#endif
+	
 #define REG_PAIR(REG1, REG2, OFFS)	ldp REG1, REG2, [x0, OFFS]
 #define REG_ONE(REG1, OFFS)		ldr REG1, [x0, OFFS]
 	GPR_LAYOUT

-- 
-keith
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