[PATCH 09/12] RISC-V: memset() size optimized version: Use compressed registers
m fally <[email protected]>
| Newsgroups | gmane.comp.lib.newlib |
|---|---|
| Message-ID | <[email protected]> |
From: Eric Salem <[email protected]> Swap register t1 with a3, so that the affected instructions can be compressed. Reviewed-by: Christian Herber <[email protected]> Reviewed-by: m fally <[email protected]> Signed-off-by: Eric Salem <[email protected]> --- newlib/libc/machine/riscv/memset.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/newlib/libc/machine/riscv/memset.S b/newlib/libc/machine/riscv/memset.S index a717ae7fb..fac0f73a2 100644 --- a/newlib/libc/machine/riscv/memset.S +++ b/newlib/libc/machine/riscv/memset.S @@ -14,13 +14,13 @@ .type memset, @function memset: #if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__) - mv t1, a0 + mv a3, a0 beqz a2, 2f 1: - sb a1, 0(t1) + sb a1, 0(a3) add a2, a2, -1 - add t1, t1, 1 + add a3, a3, 1 bnez a2, 1b 2: -- 2.49.0