Re: [PATCH 01/12] RISC-V: memmove() size optimized version: Use compressed register

LGTM

On Wed, Apr 9, 2025 at 2:51 PM m fally <[email protected]> wrote:
>
> Replace register t2 with register a5, so that lb/sb instructions can be compressed.
>
> Reviewed-by: Christian Herber <[email protected]>
> Signed-off-by: m fally <[email protected]>
> ---
>  newlib/libc/machine/riscv/memmove.S | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/newlib/libc/machine/riscv/memmove.S b/newlib/libc/machine/riscv/memmove.S
> index 66d9cd494..0f7216a68 100644
> --- a/newlib/libc/machine/riscv/memmove.S
> +++ b/newlib/libc/machine/riscv/memmove.S
> @@ -26,8 +26,8 @@ memmove:
>    add a1, a1, a4
>
>  1:
> -  lb t2, 0(a1)
> -  sb t2, 0(t1)
> +  lb a5, 0(a1)
> +  sb a5, 0(t1)
>    add   a2, a2, -1
>    add   t1, t1, a3
>    add   a1, a1, a3
> --
> 2.49.0
>