Re: [PATCH 6/6] riscv: add vectorized rawmemchr

Kito Cheng <[email protected]> Fri, 22 May 2026 16:51:05 +0800
Newsgroups gmane.comp.lib.newlib
Message-ID <CA+yXCZCXsPGUSZXDv-4sLnghB1gS-jUVyjCBeLhKwwHQVNC2=g@mail.gmail.com>
Kito Cheng <[email protected]> =E6=96=BC 2026=E5=B9=B45=E6=9C=8822=E6=97=
=A5=E9=80=B1=E4=BA=94 =E4=B8=8B=E5=8D=884:48=E5=AF=AB=E9=81=93=EF=BC=9A
>
> > +++ b/newlib/libc/machine/riscv/rawmemchr-asm.S
> > @@ -0,0 +1,30 @@
> > +#if defined(__riscv_vector) && !defined(__OPTIMIZE_SIZE__) && !defined=
(PREFER_SIZE_OVER_SPEED)
> > +.text
> > +.option push
> > +.option arch, +zve32x
> > +.global rawmemchr
> > +.type rawmemchr, @function
> > +rawmemchr:
> > +#if __riscv_landing_pad
> > +  lpad 0
> > +#endif
> > +  andi a1, a1, 0xff
> > +.Lloop:
> > +  vsetvli t0, zero, e8, m8, ta, ma
>
> Same comment as memccpy

But this is valid since it's VLMAX here

>
> > +
> > +  vle8ff.v v0, (a0)
> > +  vmseq.vx v8, v0, a1
> > +  vfirst.m a2, v8
> > +
> > +  bgez a2, .Lfound
> > +
> > +  csrr a3, vl
> > +  add a0, a0, a3
> > +  j .Lloop
> > +
> > +.Lfound:
> > +  add a0, a0, a2
> > +  ret
> > +.size rawmemchr, .-rawmemchr
> > +.option pop
> > +#endif