Re: [PATCH] Cache aligned locks for PPC64

Steve Munroe <[email protected]>
Newsgroups gmane.comp.lib.phil
Message-ID <OF55DC0CF5.0DB3CF6C-ON86256D25.006549D8-86256D25.006588D0@us.ibm.com>
Daniel Jacobowitz writes:

>  Um... this represents an ABI change for PowerPC32.  I don't believe
> you can just do this.  Anything with a lock declared in a structure 
> will break.

This is for compatibility with exist linuxthread binaries?
lmpx.com only provides a reader for public news (NNTP) servers. It is not affiliated with the servers or forums shown here and is not responsible for the content of articles, which is written by their respective authors.