[PATCH 1/3] NPTL/ARCv2: Implement full memory barrier for NPTL
Vineet Gupta <[email protected]> Wed, 21 Oct 2015 12:42:23 +0530
| Newsgroups | gmane.comp.lib.uclibc.general |
|---|---|
| Message-ID | <[email protected]> |
Signed-off-by: Vineet Gupta <[email protected]> --- libc/sysdeps/linux/arc/bits/atomic.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/libc/sysdeps/linux/arc/bits/atomic.h b/libc/sysdeps/linux/arc/bits/atomic.h index d4abf4eb7896..1fdc83f70f6b 100644 --- a/libc/sysdeps/linux/arc/bits/atomic.h +++ b/libc/sysdeps/linux/arc/bits/atomic.h @@ -24,8 +24,11 @@ typedef uintmax_t uatomic_max_t; void __arc_link_error (void); -#define atomic_full_barrier() \ - __asm__ __volatile__("": : :"memory") +#ifdef __A7__ +#define atomic_full_barrier() __asm__ __volatile__("": : :"memory") +#else +#define atomic_full_barrier() __asm__ __volatile__("dmb 3": : :"memory") +#endif /* Atomic compare and exchange. */ -- 1.9.1