STOC Tutorial on Algorithms for Memory-Sensitive Computing

Call for Participation

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   STOC Tutorial on Algorithms for Memory-Sensitive Computing

   Location: 251 Mercer St, New York University
   Date: May 19th, 2012

   http://cs.nyu.edu/~stoc2012/tutorials.htm

   [Part of the workshop/tutorial day preceding STOC].

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Memory effects -- be they cache misses or page misses -- can
have a dominant impact on the running time of an algorithm. In
the case of page misses, a disk seek can be more than six
orders of magnitude slower than a CPU instruction.  Thus, even
small savings in the number of memory transfers can have a
large impact on running time.

This disproportionate importance of the memory hierarchy,
combined with the large and growing appetite for large data,
make memory-sensitive algorithms an area with active
technology transfer from algorithmics to the rest of computer
science and to the commercial world. This workshop focuses on
algorithmic approaches that have seen high impact outside of
academic TCS. The tutorials themselves will highlight the
importance of algorithmic advances in making the technology
possible.

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Registration

Registration is available on the STOC web site.  Please contact
workshop organizers directly (Michael Bender, Martin Farach-Colton)
if you are interested in attending only the workshop and not STOC.

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Schedule

1:30pm-2:30pm The History of I/O Models
Erik Demaine, MIT

2:30pm-3:30pm I/O and Geometry
Pankaj Agarwal, Duke and Scalgo, Inc
Lars Arge, Aarhus and Scalgo, Inc

3:30pm-4:00pm Break

4:00pm-5:00pm I/O and Strings
Paolo Ferragina, Pisa

5:00pm-6:00pm I/O and Databases
Michael Bender, Stoney Brook and Tokutek, Inc
Martin Farach-Colton, Rutgers and Tokutek, Inc

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