Call for Papers: TMSCS Special Issue on Advances in Parallel Graph Processing

"Halappanavar, Mahantesh M" <[email protected]> Fri, 11 Nov 2016 17:50:12 +0000
Newsgroups gmane.comp.mathematics.csc
Message-ID <D44B44D5.1C915%[email protected]>
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CALL FOR PAPERS
IEEE Transactions on Multi-Scale Computing Systems
Special Issue on Advances in Parallel Graph Processing: Algorithms, Archite=
ctures and Application Frameworks

GUEST EDITORS:
Ananth Kalyanaraman, Washington State University, Pullman, WA, USA ananth@e=
ecs.wsu.edu<mailto:ananth-B5DvpLVBExT2fBVCVOL8/[email protected]>
Mahantesh Halappanavar, Pacific Northwest National Laboratory, Richland, WA=
, USA [email protected]<mailto:[email protected]>

Synopsis
In the sphere of modern data science and applications, graph algorithms hav=
e achieved a pivotal place in advancing the state of scientific discovery a=
nd knowledge. Nearly three centuries of ideas have made graph theory and it=
s applications a mature area in computational sciences. Yet, today we find =
ourselves at crossroads between theory and application. Spurred by the digi=
tal revolution, data from over a diverse range of high throughput channels =
and devices, from across internet-scale applications, are starting to mark =
a new era in data-driven computing and discovery. Building robust graph mod=
els and implementing scalable graph application frameworks in the context o=
f this new era are proving to be significant challenges. Concomitant to the=
 digital revolution, we have also experienced an explosion in computing arc=
hitectures, with a broad range of multicores, manycores, heterogeneous plat=
forms and hardware accelerators (CPUs, GPUs) being actively developed and d=
eployed within servers and multinode clusters. Recent advances have started=
 to show that in more than one way, these two fields - graph theory and arc=
hitectures - are capable of benefiting and in fact spurring new research di=
rections in one another.

This special issue invites original research papers and authoritative posit=
ion/survey papers that showcase cutting-edge research at the intersection o=
f graph algorithms, graph applications and advanced architectures. Research=
 topics of particular interest include (but not limited to):


-       Design of efficient, scalable architectures for graph-theoretic pro=
cessing
-       Models and approaches for accelerated graph construction on chip
-       Characterization of graph operations based on computational charact=
eristics
-       Hardware and algorithmic techniques to reduce latency and to improv=
e data locality
-       Comparative evaluation of hardware architectures for different grap=
h operations
-       Efficient approaches to utilize heterogeneous architectures for gra=
ph computing
-       Communication-reducing techniques and paradigms for large-scale gra=
ph applications
-       Power and energy efficiency of graph operations on chip
-       Processing dynamic graphs and graph streams on chip
-       High-end graph applications using high performance architectures an=
d platforms

IMPORTANT DATES:
Open for submissions in ScholarOne Manuscripts:  February 1, 2017
Closed for submissions:                          March 1, 2017
Results of first round of reviews:               May 1, 2017
Submission of revised manuscripts:               July 1, 2017
Results of second round of reviews:              August 1, 2017
Publication materials due:                       September 1, 2017

SUBMISSION GUIDELINES:
Prospective authors are invited to submit their manuscripts electronically =
after the =93open for submissions=94 date, adhering to the IEEE Transaction=
s on Multi-Scale Computing Systems guidelines (http://www.computer.org/port=
al/web/tmscs/author). Please submit your papers through the online system (=
https://mc.manuscriptcentral.com/tmscs-cs) and be sure to select the specia=
l issue name. Manuscripts should not be published or currently submitted fo=
r publication elsewhere. Please submit only full papers intended for review=
, not abstracts, to the ScholarOne portal. If requested, abstracts should b=
e sent by e-mail to the Guest Editors directly.

~Mahantesh Halappanavar

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<div>
<div style=3D"font-family: -webkit-standard;">CALL FOR PAPERS</div>
<div style=3D"font-family: -webkit-standard;">IEEE Transactions on Multi-Sc=
ale Computing Systems</div>
<div style=3D"font-family: -webkit-standard;">Special Issue on Advances in =
Parallel Graph Processing: Algorithms, Architectures and Application Framew=
orks</div>
<div style=3D"font-family: -webkit-standard;"><br>
</div>
<div style=3D"font-family: -webkit-standard;">GUEST EDITORS:</div>
<div style=3D"font-family: -webkit-standard;">Ananth Kalyanaraman, Washingt=
on State University, Pullman, WA, USA&nbsp;<a href=3D"mailto:[email protected]=
u.edu">ananth-B5DvpLVBExT2fBVCVOL8/[email protected]</a></div>
<div style=3D"font-family: -webkit-standard;">Mahantesh Halappanavar, Pacif=
ic Northwest National Laboratory, Richland, WA, USA&nbsp;<a href=3D"mailto:=
[email protected]">[email protected]</a></div>
<div style=3D"font-family: -webkit-standard;"><br>
</div>
<div style=3D"font-family: -webkit-standard;">Synopsis</div>
<div style=3D"font-family: -webkit-standard;">In the sphere of modern data =
science and applications, graph algorithms have achieved a pivotal place in=
 advancing the state of scientific discovery and knowledge. Nearly three ce=
nturies of ideas have made graph theory
 and its applications a mature area in computational sciences. Yet, today w=
e find ourselves at crossroads between theory and application. Spurred by t=
he digital revolution, data from over a diverse range of high throughput ch=
annels and devices, from across
 internet-scale applications, are starting to mark a new era in data-driven=
 computing and discovery. Building robust graph models and implementing sca=
lable graph application frameworks in the context of this new era are provi=
ng to be significant challenges.
 Concomitant to the digital revolution, we have also experienced an explosi=
on in computing architectures, with a broad range of multicores, manycores,=
 heterogeneous platforms and hardware accelerators (CPUs, GPUs) being activ=
ely developed and deployed within
 servers and multinode clusters. Recent advances have started to show that =
in more than one way, these two fields - graph theory and architectures - a=
re capable of benefiting and in fact spurring new research directions in on=
e another.</div>
<div style=3D"font-family: -webkit-standard;"><br>
</div>
<div style=3D"font-family: -webkit-standard;">This special issue invites or=
iginal research papers and authoritative position/survey papers that showca=
se cutting-edge research at the intersection of graph algorithms, graph app=
lications and advanced architectures.
 Research topics of particular interest include (but not limited to):</div>
<div style=3D"font-family: -webkit-standard;"><br>
</div>
<div style=3D"font-family: -webkit-standard;"><br>
</div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; Design of efficient, scalable architectures for graph-theoretic pr=
ocessing</div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; Models and approaches for accelerated graph construction on chip</=
div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; Characterization of graph operations based on computational charac=
teristics</div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; Hardware and algorithmic techniques to reduce latency and to impro=
ve data locality</div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; Comparative evaluation of hardware architectures for different gra=
ph operations</div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; Efficient approaches to utilize heterogeneous architectures for gr=
aph computing</div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; Communication-reducing techniques and paradigms for large-scale gr=
aph applications</div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; Power and energy efficiency of graph operations on chip</div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; Processing dynamic graphs and graph streams on chip</div>
<div style=3D"font-family: -webkit-standard;">-&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; High-end graph applications using high performance architectures a=
nd platforms</div>
<div style=3D"font-family: -webkit-standard;"><br>
</div>
<div style=3D"font-family: -webkit-standard;">IMPORTANT DATES:</div>
<div style=3D"font-family: -webkit-standard;">Open for submissions in Schol=
arOne Manuscripts:&nbsp;&nbsp;February 1, 2017</div>
<div style=3D"font-family: -webkit-standard;">Closed for submissions:&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
March 1, 2017</div>
<div style=3D"font-family: -webkit-standard;">Results of first round of rev=
iews:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp; May 1, 2017</div>
<div style=3D"font-family: -webkit-standard;">Submission of revised manuscr=
ipts:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp; July 1, 2017</div>
<div style=3D"font-family: -webkit-standard;">Results of second round of re=
views:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;August 1, 2017</div>
<div style=3D"font-family: -webkit-standard;">Publication materials due:&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; September 1, 2017</d=
iv>
<div style=3D"font-family: -webkit-standard;"><br>
</div>
<div style=3D"font-family: -webkit-standard;">SUBMISSION GUIDELINES:</div>
<div style=3D"font-family: -webkit-standard;">Prospective authors are invit=
ed to submit their manuscripts electronically after the =93open for submiss=
ions=94 date, adhering to the IEEE Transactions on Multi-Scale Computing Sy=
stems guidelines (<a href=3D"http://www.computer.org/portal/web/tmscs/autho=
r">http://www.computer.org/portal/web/tmscs/author</a>).
 Please submit your papers through the online system (<a href=3D"https://mc=
.manuscriptcentral.com/tmscs-cs">https://mc.manuscriptcentral.com/tmscs-cs<=
/a>) and be sure to select the special issue name. Manuscripts should not b=
e published or currently submitted
 for publication elsewhere. Please submit only full papers intended for rev=
iew, not abstracts, to the ScholarOne portal. If requested, abstracts shoul=
d be sent by e-mail to the Guest Editors directly.</div>
</div>
<div style=3D"font-family: -webkit-standard;"><br>
</div>
<div style=3D"font-family: -webkit-standard;">~Mahantesh Halappanavar</div>
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