12th IEEE Int. Conf. High Performance Computing (HiPC 2005), Goa, India
Ali Pinar <apinar-/[email protected]> Thu, 10 Mar 2005 10:04:05 -0800
| Newsgroups | gmane.comp.mathematics.csc |
|---|---|
| Organization | Lawrence Berkeley National Lab |
| Message-ID | <[email protected]> |
12th IEEE International Conference on
High Performance Computing (HiPC 2005)
Goa, India
December 18-21, 2005
http://www.hipc.org
The 12th Annual IEEE International Conference on High Performance Computing
(HiPC 2005) will be held in Goa, India, during December 18-21, 2005. It will
serve as a forum to present the current work by researchers from around
the world, act as a venue to provide stimulating discussions and highlight
high performance computing activities in Asia. The conference has a
history of attracting participation from reputed researchers from all over
the world.
HiPC 2005 will emphasize the design and analysis of high performance
computing and networking systems and their scientific, engineering, and
commercial applications. In addition to technical sessions consisting of
contributed papers, the conference will include invited presentations, a
poster session, tutorials, and vendor presentations.
IMPORTANT DATES
May 02, 2005 Conference Paper Due
May 09, 2005 Workshop Proposal Due
May 16, 2005 Tutorial Proposal Due
July 11, 2005 Notification of Acceptance/Rejection
August 15, 2005 Camera-Ready Paper Due
October 03, 2005 Poster/Presentation Summary Due
CALL FOR PAPERS
Topics of interest include but are not limited to:
* Wireless and Mobile Computing * Parallel and Distributed
Computing
* Sensor Networks * Parallel Algorithms
* Communication Networks * Heterogeneous Computing
* Web-based/Meta/Grid/P2P Computing * Network and Cluster-based
Computing
* Resource Management and Resource Area * Context Aware Computing
Networks
* Scalable Servers and System Areas * Embedded Applications and
Systems
* Scientific/Engineering Applications * Network Processor and Router
Architectures
* Commercial Applications and Workloads * Scalable and Latency-tolerant
Algorithms
* High-speed Networks and Interconnection * Parallel Languages and
Programming
Networks Environments
* Power-Efficient and Reconfigurable * EPIC Compilers and Software
Architectures Support for ILP and TLP
* Superscalar, Speculative, VLIW, and * Operating Systems for
Scalable and
SMT Microarchitectures High-performance Computing
* System Design for High Reliability * Load Balancing and Scheduling
* Compiler Technology for Power-aware * High-performance Computing for
and High-performance Computing Biology and Medicine
Manuscript submission procedures are available over the Web at www.hipc.org.
POSTER/PRESENTATION SESSION
In addition to the contributed papers session, a plenary poster/presentation
session emphasizing novel applications of high performance computing is
planned.
TUTORIALS
Proposals are solicited for tutorials to be held at the meeting.
EXHIBITS/VENDOR PRESENTATIONS
Companies and R&D laboratories are encouraged to present their exhibits at
the meeting. In addition, a full day of vendor presentations is planned. For
details, visit www.hipc.org/hipc2005/