Re: APIC trigger mode

On Tue, 2012-03-13 at 13:02 +0100, Sebastian Sumpf wrote:
> Hi there,
> 
> I have a question regarding the APIC-interrupt mode settings on x86. I
> see that one has to set the mode externally in Fiasco.OC using the
> 'l4_icu_set_mode' call. Also I had a look at Nova which seems to program
> these modes from within the kernel, using edge/high for IRQ 0-15 and
> level-low for IRQ 16-23. Would that be a valid assumption to program the
> modes for Fiasco.OC x86 also, or is there an other way to find out the
> interrupt-trigger modes of IRQs (other than the ones found in
> ACPI-MADT)? Why is it necessary to set these modes outside the kernel?


I'm not sure if there is anything in the MADT, L4Re (Io) uses the DSDT
IRQ routing information that also contains the tigger levels and modes
for the IRQs and the routing of IO-APIC IRQs to the PCI devices.  This
needs an ACPI AML interpreter that could not be in the kernel.


-- 
Alex