Fiasco.OC (rev. 40) Pandaboard support

Hi L4-hackers,

recently I've tried to adapt Genode's Fiasco.OC-platform support to use
the latest Fiasco.OC/L4Re subversion revision. When trying it on x86 I
didn't run into any trouble. It worked "out of the box".
But when it came to ARM, I got problems to boot Fiasco.OC on the
Pandaboard in general (also when using plain Fiasco.OC/L4Re).

I've debugged the problem down to Cpu::init_errata_workarounds(). The
problem is that pandaboard's boot code initializes TrustZone, and
triggers a configuration-disable signal beforehand. That leads to
'undefined instruction' exceptions, whenever one tries to write into the
p15/c15-c0-1 debug register (like it's done in init_errata_workarounds).
The attached patch implements Cpu::init_errata_workarounds() empty for
the pandaboard. Moreover, it restricts the appliance of ERRATA 743622 to
CPU revisions: r2p0-r2p2.

With the attached patch Fiasco.OC runs fine on the Pandaboard too.

Best regards
Stefan

-- 
Stefan Kalkowski
Genode Labs

http://www.genode-labs.com/ · http://genode.org/

Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden
Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

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Index: kernel/fiasco/src/kern/arm/cpu-arm.cpp
===================================================================
--- kernel/fiasco/src/kern/arm/cpu-arm.cpp	(revision 40)
+++ kernel/fiasco/src/kern/arm/cpu-arm.cpp	(working copy)
@@ -428,9 +428,15 @@
 void Cpu::init_errata_workarounds() {}
 
 //---------------------------------------------------------------------------
-IMPLEMENTATION [arm && armv6plus]:
+IMPLEMENTATION [arm && armv6plus && omap4_pandaboard]:
 
 PRIVATE static inline
+void Cpu::init_errata_workarounds() {}
+
+//---------------------------------------------------------------------------
+IMPLEMENTATION [arm && armv6plus && !omap4_pandaboard]:
+
+PRIVATE static inline
 void
 Cpu::set_actrl(Mword bit_mask)
 {
@@ -494,8 +500,8 @@
           if (rev == 0x20 || rev == 0x21 || rev == 0x22)
             set_c15_c0_1((1 << 12) | (1 << 22));
 
-          // errata: 743622
-          if ((rev & 0xf0) == 0x20)
+          // errata: 743622 (r2p0 - r2p2)
+          if ((rev & 0xf0) == 0x20 && (rev & 0xf) < 0x3)
             set_c15_c0_1(1 << 6);
 
           // errata: 751472
@@ -505,6 +511,9 @@
     }
 }
 
+//---------------------------------------------------------------------------
+IMPLEMENTATION [arm && armv6plus]:
+
 IMPLEMENT
 void
 Cpu::id_init()