Re: Question regarding the "Jdb::handle_user_request()' function

Christian Prochaska <[email protected]>
Newsgroups gmane.comp.micro-kernel.l4.devel
Message-ID <[email protected]>
On 18.03.2013 23:23, Adam Lackorzynski wrote:
> Hi,
>
> On Tue Mar 12, 2013 at 00:19:58 +0100, Christian Prochaska wrote:
>> the 'Jdb::enter_jdb()' function in file 'jdb.cpp' contains the following code:
>>
>> // check for int $3 user debugging interface
>> if (foreach_cpu(&handle_user_request, true))
>>    {
>>      close_debug_console(cpu);
>>      leave_trap_handler(cpu);
>>      return 0;
>>    }
>>
>> I'm not sure why in this case the second argument of 'foreach_cpu()' is true. I understand that it causes the result to be true only
>> if the 'handle_user_request()' function returned true for every currently running CPU. But I found that this can be a problem when
>> using the '-jdb_cmd=JS' kernel argument: if only one CPU is currently running, the result of 'foreach_cpu()' is true, but when two
>> CPUs are currently running, the 'handle_user_request()' function returns true only for one CPU, which makes the end result false and
>> causes the kernel to stop with the JDB prompt shown. Can somebody please explain?
> I think your observation is correct concerning the behaviour of
> foreach_cpu. Are you seeing this on x86? I would like to see the same on
> my setup.

Yes, on x86. I'm running 'qemu-system-i386' with the '-smp 2' option and 
it happens only some of the times. The kernel output is attached.

Christian

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jdb_cmd_js.txt (text/plain, 4.6 KB)
Welcome to Fiasco.OC (ia32)!
L4/Fiasco.OC ia32 microkernel (C) 1998-2013 TU Dresden
Rev: rexporte compiled with gcc 4.7.2 for Intel Pentium    []
Build: #1 Tue Mar 19 23:23:27 CET 2013

Performance-critical config option(s) detected:
  CONFIG_NDEBUG is off

Superpages: yes
Kmem:: cpu page at 3ffd000 (4096Bytes)
Per_cpu_data_alloc: (orig: 0xf0079ca0-0xf007a328)
ACPI-Init
ACPI: RSDP[0xfd890]	r00 OEM:BOCHS.
Boot_alloc: size=0x14
Boot_alloc: allocated extra memory block @0xfcbf9000 (size=400)
Boot_alloc: @ 0xfcbf9000
Boot_alloc: remaining free block @ 0xfcbf9018 (size=3e8)
ACPI: RSDT[0x203fe3d0]	r01 OEM:BOCHS. OEMTID:BXPCRSDT
ACPI: FACP[0x203fff80]	r01 OEM:BOCHS. OEMTID:BXPCFACP
ACPI: SSDT[0x203ffe30]	r01 OEM:BOCHS. OEMTID:BXPCSSDT
ACPI: APIC[0x203ffd10]	r01 OEM:BOCHS. OEMTID:BXPCAPIC
ACPI: HPET[0x203ffcd0]	r01 OEM:BOCHS. OEMTID:BXPCHPET
ACPI: SSDT[0x203ff660]	r01 OEM:BXPC.. OEMTID:BXSSDTPC
IO-APIC: MADT = 0x203ffd10
IO-APIC[ 0]: struct: 0x203ffd4c adr=fec00000
Boot_alloc: size=0x1c
Boot_alloc: @ 0xfcbf9018
Boot_alloc: remaining free block @ 0xfcbf9038 (size=3c8)
Boot_alloc: size=0x120
Boot_alloc: @ 0xfcbf9038
Boot_alloc: remaining free block @ 0xfcbf9158 (size=2a8)
IO-APIC[ 0]: pins 24
  PIN[ 0m]: vector=20, del=0, dm=physical, dest=0 (high, edge)
  PIN[ 1m]: vector=21, del=0, dm=physical, dest=0 (high, edge)
  PIN[ 2m]: vector=22, del=0, dm=physical, dest=0 (high, edge)
  PIN[ 3m]: vector=23, del=0, dm=physical, dest=0 (high, edge)
  PIN[ 4m]: vector=24, del=0, dm=physical, dest=0 (high, edge)
  PIN[ 5m]: vector=25, del=0, dm=physical, dest=0 (high, edge)
  PIN[ 6m]: vector=26, del=0, dm=physical, dest=0 (high, edge)
  PIN[ 7m]: vector=27, del=0, dm=physical, dest=0 (high, edge)
  PIN[ 8m]: vector=28, del=0, dm=physical, dest=0 (high, edge)
  PIN[ 9m]: vector=29, del=0, dm=physical, dest=0 (high, edge)
  PIN[10m]: vector=2a, del=0, dm=physical, dest=0 (high, edge)
  PIN[11m]: vector=2b, del=0, dm=physical, dest=0 (high, edge)
  PIN[12m]: vector=2c, del=0, dm=physical, dest=0 (high, edge)
  PIN[13m]: vector=2d, del=0, dm=physical, dest=0 (high, edge)
  PIN[14m]: vector=2e, del=0, dm=physical, dest=0 (high, edge)
  PIN[15m]: vector=2f, del=0, dm=physical, dest=0 (high, edge)
  PIN[16m]: vector=30, del=0, dm=physical, dest=0 (high, edge)
  PIN[17m]: vector=31, del=0, dm=physical, dest=0 (high, edge)
  PIN[18m]: vector=32, del=0, dm=physical, dest=0 (high, edge)
  PIN[19m]: vector=33, del=0, dm=physical, dest=0 (high, edge)
  PIN[20m]: vector=34, del=0, dm=physical, dest=0 (high, edge)
  PIN[21m]: vector=35, del=0, dm=physical, dest=0 (high, edge)
  PIN[22m]: vector=36, del=0, dm=physical, dest=0 (high, edge)
  PIN[23m]: vector=37, del=0, dm=physical, dest=0 (high, edge)
IO-APIC: dual 8259: yes
IO-APIC: ovr[ 0] 00 -> 2
IO-APIC: ovr[ 1] 05 -> 5
IO-APIC: ovr[ 2] 09 -> 9
IO-APIC: ovr[ 3] 0a -> a
IO-APIC: ovr[ 4] 0b -> b
Boot_alloc: size=0x4
Boot_alloc: @ 0xfcbf9158
Boot_alloc: remaining free block @ 0xfcbf9160 (size=2a0)
Allocate cpu_mem @ 0xfcbf9400
FPU0: SSE 
Local APIC[00]: version=11 max_lvt=5
APIC ESR value before/after enabling: 00000000/00000000
Using the Local APIC timer on vector 90 (Periodic Mode) for scheduling
SERIAL ESC: allocated IRQ 4 for serial uart
SERIAL ESC: allocated IRQ 4 for serial uart
Not using serial hack in slow timer handler.
Boot_alloc: size=0x14
Boot_alloc: @ 0xfcbf9160
Boot_alloc: remaining free block @ 0xfcbf9178 (size=288)
Boot_alloc: size=0x300
Boot_alloc: allocated extra memory block @0xfcbf9800 (size=400)
Boot_alloc: @ 0xfcbf9800
Boot_alloc: remaining free block @ 0xfcbf9b00 (size=100)
Enable MSI support: chained IRQ mgr @ 0xfcbf9158
Absolute KIP Syscalls using: Sysenter
CPU[0]: GenuineIntel (6:3:3:0)[00000633] Model: QEMU Virtual CPU version 1.2.0 at 3299MHz

  32 KB L1 I Cache (8-way associative, 64 bytes per line)
  32 KB L1 D Cache (8-way associative, 64 bytes per line)
2048 KB L2 U Cache (8-way associative, 64 bytes per line)

Freeing init code/data: 16384 bytes (4 pages)

Per_cpu_data_alloc: (orig: 0xf0079ca0-0xf007a328)
Allocate 1672 bytes (2KB) for CPU[4] local storage (offset=c928360, 0xfc9a2000-0xfc9a2688)
MP: detecting APs...
Calibrating timer loop... Per_cpu_data_alloc: (orig: 0xf0079ca0-0xf007a328)
Allocate 1672 bytes (2KB) for CPU[1] local storage (offset=c928b60, 0xfc9a2800-0xfc9a2e88)
done.
Allocate cpu_mem @ 0xfcbf9c00
Local APIC[01]: version=11 max_lvt=5
APIC ESR value before/after enabling: 00000000/00000000
Using the Local APIC timer on vector 90 (Periodic Mode) for scheduling

FPU1: SSE 
CPU[1]: goes to idle loop

    -----------------------------------------------------------------------      
    CPU 0 [f002ca6c]: invalid ctrl sequence "JS"
    CPU 1 [f00304d9]: Maskable Interrupt
jdb:
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