Re: Fiasco.OC with ARM TrustZone
Chao-Jui Chang <[email protected]>
| Newsgroups | gmane.comp.micro-kernel.l4.devel |
|---|---|
| Message-ID | <CAM=iH4ocBo0FuZzG4NxJCsDh4WkuKcL=qsxRfZm2sRgBALgwpg@mail.gmail.com> |
Hi Adam, Could you let me know how to check it and what to printf ? Thanks, Chao-Jui 2013/6/10 Adam Lackorzynski <[email protected]> > > Timer for CPU0 is at IRQ 28 > > Calibrating timer loop... > > So timer not working or something with interrupts not working. > Could you check whether the mct is working ok, e.g. by adding a few > relevant printfs? > > > Here is "TrustZone secure side" > > ### Cut start ### > > Hello from Startup::stage2 > > > > Number of IRQs available at this GIC: 160 > > GIC: Switching IRQ 32 to secure > > GIC: Switching IRQ 33 to secure > ... > > ### End ### > > It stop here. > > > > Any idea? > > I'm wondering why so many IRQs are allocated so early in boot-up? > > > > Adam > -- > Adam [email protected] > Lackorzynski http://os.inf.tu-dresden.de/~adam/ > > _______________________________________________ > l4-hackers mailing list > [email protected] > http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers > _______________________________________________ l4-hackers mailing list [email protected] http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers