Re: L4Re GPIO

On 12/21/2014 11:36 PM, Adam Lackorzynski wrote:
> On Tue Dec 16, 2014 at 16:01:02 +0700, Erry Pradana Darajati wrote:
[...]
>> 2. I have modified omap3 driver that included in the package to be used
>> with omap4460 registers, but i have a few difficulties. There are few
>> missing registers (like Clr_irq_enable1 register that not present in
>> OMAP4460) and i am still cannot comprehend the scm_offset table. Because
>> when i crossreferencing the source with the OMAP3 TRM the i cannot
>> understand the value. My question is. Is it be able to use only some of the
>> defined register to do simple IO task, and enable or disable register ?
> 
> I've not written the particular code, but the scm_offset seems to select
> a specific gpio block.
> For starting to work on a driver I recommend to start with a simple
> program and directly work on the MMIO. This helps to understand how the
> device is working. When basic things work, such as switching pins
> on/off, settings directions, interrupts, etc things can be integrated.

On Omap3/4 the pin function and the pull-up-down mode is configured via
the System Control Module (scm). There is a 16-bit register for each pin
but unfortunately these registers are not in a particular order. So we
need an offset table to find the correct register for each pin. The
corresponding part for each GPIO chip of the offset table is specified
via the 'scm_offset' parameter.

Matthias.


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