Re: Porting Fiasco.OC to RISC-V - Questions
Adam Lackorzynski <[email protected]>
| Newsgroups | gmane.comp.micro-kernel.l4.devel |
|---|---|
| Message-ID | <[email protected]> |
Hi, On Thu Mar 12, 2015 at 12:49:05 +0000, Hesham ALMatary wrote: > Thanks for your reply. I thought it would be a good idea to start with > L4Re to familiarize myself with Fiasco.OC/L4Re structure, and chose to > start with L4Re because it doesn't need a lot of architecture > dependent code. So, after your reply, I'd work on getting bootstrap > working and loading the "to-be-evolved" Fiasco.OC RISC-V kernel. This > would allow me to debug and test Fiasco.OC/risc-v as I add new > code/features their. Ack. Adam -- Adam [email protected] Lackorzynski http://os.inf.tu-dresden.de/~adam/