Re: Using a second UART to control a serial device
Adam Lackorzynski <[email protected]>
| Newsgroups | gmane.comp.micro-kernel.l4.devel |
|---|---|
| Message-ID | <[email protected]> |
On Tue May 05, 2015 at 10:36:59 -0400, teclis High Elf wrote: > I have almost identical code except I'm running on a mips based platform > with a 16550 UART so I don't use the shift parameter. I do the > regs->writes() but when I peek at the physical memory with GDB I don't see > the values I wrote. The l4io_request_iomem() is called with > L4IO_MEM_NONCACHED (and there is no enabled cache in my setup) and it > doesn't return an error. I doesn't look like the values are getting written > to the mmio block. I'm wondering, the offsets are 1-byte apart or more? I might be wrong but one byte variant it typically quite x86-ish. Otherwise check the mapping as described in the previous mail. Adam -- Adam [email protected] Lackorzynski http://os.inf.tu-dresden.de/~adam/