Porting Fiasco + L4Re to Raspberry Pi 2

Hello l4-hackers,

I am currently working on porting the Fiasco.OC micro kernel onto the
Raspberry pi 2.

Therefore, I am struggling with memory mapping, and I encounter the
following error when launching the default 'hello' entry:

L4 Bootstrapper
  Build: #2 Tue Feb 23 11:57:19 CET 2016, 4.8.3 20140303 (prerelease)
  Scanning up to 1024 MB RAM, starting at offset 32MB
  Memory size is 1024MB (00000000 - 3fffffff)
  RAM: 0000000000000000 - 000000003fffffff: 1048576kB
  Total RAM: 1024MB
  Scanning fiasco
  Scanning sigma0
  Scanning moe
  Moving up to 5 modules behind 1100000
  moving module 02 { 10db000-110c4d7 } -> { 11cc000-11fd4d7 } [201944]
  moving module 01 { 10c9000-10da373 } -> { 11ba000-11cb373 } [70516]
  moving module 00 { 1043000-10c889f } -> { 1134000-11b989f } [546976]
  moving module 04 { 1029000-10425af } -> { 111a000-11335af } [103856]
  moving module 03 { 100f000-102849b } -> { 1100000-111949b } [103580]
  Loading fiasco
  Loading sigma0
  Loading moe
  find kernel info page...
  found kernel info page at 0x2000
Regions of list 'regions'
    [     1000,      1aff] {      b00} Kern   fiasco
    [     2000,     92fff] {    91000} Kern   fiasco
    [    93000,     930eb] {       ec} Root   mbi_rt
    [    c0000,     c9c33] {     9c34} Sigma0 sigma0
    [    d0000,     d6177] {     6178} Sigma0 sigma0
    [   140000,    16905b] {    2905c} Root   moe
    [   170000,    17b58b] {     b58c} Root   moe
    [  1000000,   100e4ff] {     e500} Boot   bootstrap
    [  1100000,   1133fff] {    34000} Root   Module
  API Version: (87) experimental
  Sigma0 config    ip:000c0100 sp:00000000
  Roottask config  ip:00140250 sp:00000000
  Starting kernel fiasco at 000012b8
  Non-HYP kernel detected but running in HYP mode, switching back.
Hello from Startup::stage2

Assertion failed
at /home/adebut/Documents/snapshotTest/l4re-snapshot-2015123115/src/kernel/fiasco/src/kern/buddy_alloc.cpp:101:
(unsigned long)block >= _base

Press any key to reboot.

I am currently working on the latest snapshot (2015123115), with
U-Boot as a bootloader, and testing on a real board (Raspberry Pi 2
model B V1.1). The entry built is the standard 'hello', and I use the
ramdisk-arm.rd given in the snapshot.

I did add a custom Bsp for the board, mainly based on the first
Raspberry Pi except for the Base Address, that is 0x3F000000
instead of the first Pi's 0x20000000.

I highly think that it is an address configuration problem, because it
first happened when I did expand the RAM size to 1024MB.
With further investigation, I found out that it was the kernel memory
allocation that causes this error, and suspect an incorrect MMU mapping.
This suspicion comes from the fact that the assertion takes the address
_base (0xf0400000) and the currently allocated block (0xee100000).

I did not modify any parameter in the kern/arm/mem_layout-arm.cpp file
on the Fiasco directory, which provides the default ARM addressing.
Maybe that's where my error comes from ? How can I correctly configure
my memory mapping, besides what I already configure in the Bsp (given in
attachment) ?

Also, it is the first time that I am assigned for porting a system, do
you have some hints, like important steps to follow ?

I am pretty sure it is a newbie error, but I cannot figure it out for
now :(

Thanks in advance for your time,

-- 
Antoine Debut
EPITA 2016 - GISTRE

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/*!
 * \file   rpi.cc
 * \brief  Support for the Raspberry Pi
 *
 * \date   2013
 * \author Adam Lackorzynski <[email protected]>
 *
 */
/*
 * (c) 2013 Author(s)
 *     economic rights: Technische Universität Dresden (Germany)
 *
 * This file is part of TUD:OS and distributed under the terms of the
 * GNU General Public License 2.
 * Please see the COPYING-GPL-2 file for details.
 */

#include "support.h"
#include <l4/drivers/uart_pl011.h>

namespace {

class Platform_arm_rpi2 : public Platform_single_region_ram
{
  bool probe() { return true; }

  void init()
  {
    static L4::Io_register_block_mmio r(0x3f201000);
    static L4::Uart_pl011 _uart(3000000);
    _uart.startup(&r);
    set_stdio_uart(&_uart);
  }
};
}

REGISTER_PLATFORM(Platform_arm_rpi2);