I/O flexpages / new mapping DB issue with overlapping ports

Hi,

I have a problem using I/O flexpages with Pistachio. My application raises
I/O pagefaults and the pager replies the corresponding I/O flexpage. But an
assertion is triggered if an I/O fpage should be mapped while the application
has already mapped parts of that I/O fpage, for example

  1. I/O fault port=0xcfb size=1  =>  map I/O flexpage  (ok)
  2. I/O fault port=0xcf8 size=4  =>  map I/O flexpage

At this point a kernel assertion is triggered:

Assertion isize > newsize failed in 
file /home/fm3/src/pistachio/kernel/src/generic/vrt.cc, line 346 
(fn=f01029b1)

Any ideas?

Frank
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