Re: I/O flexpages / new mapping DB issue with overlapping ports

[Frank Mehnert]
> Hi,
> I have a problem using I/O flexpages with Pistachio. My application
> raises I/O pagefaults and the pager replies the corresponding I/O
> flexpage. But an assertion is triggered if an I/O fpage should be
> mapped while the application has already mapped parts of that I/O
> fpage, for example

>   1. I/O fault port=0xcfb size=1  =>  map I/O flexpage  (ok)
>   2. I/O fault port=0xcf8 size=4  =>  map I/O flexpage

> At this point a kernel assertion is triggered:

> Assertion isize > newsize failed in 
> file /home/fm3/src/pistachio/kernel/src/generic/vrt.cc, line 346 
> (fn=f01029b1)

> Any ideas?

Actually.  I just realized that there were a number of pending fixes
to the vrt stuff from a long time ago that I had forgot to committ.
Have committed it now (together with a lot of other stuff).

	eSk