Re: I/O flexpages / new mapping DB issue with overlapping ports

[Frank Mehnert]
> On Friday 09 June 2006 16:48, Espen Skoglund wrote:
>>>> There was at some stage some loose talk about implementing an MSR
>>>> space with similar semantics as the IO space.  This is quite
>>>> trivial to do using the current code base in Pistachio.  Whether
>>>> there are any real benefits to doing so is a different question.
>>> 
>>> In difference to the IO space the MSR space would contain only one
>>> fpage covering the whole MSR space as long as we don't talk about
>>> VT. Since I'm not aware of any MSR which is frequently read or
>>> written, there is probably no reason to allow non-privileged tasks
>>> the access to MSRs.
>> 
>> Yeah.  The best examples I can think of are the MSRs for debugging
>> and performance monitoring.  Anyhow, there's nothing stopping you
>> from mapping single MSRs if you want to.  The code base for doing
>> so is there.

> I'm a bit surprised: How to map single MSRs? The MSRs on IA32 are
> accessed using wrmsr and rdmsr. And there is no bitmap like the IO
> bitmap for IO ports... Of course, reading from/writing to MSRs could
> be emulated in the kernel or in privileged tasks where such a bitmap
> could be maintained.

Right.  You'd have to trap any read/write accesses and emulate them in
the kernel anyway since they are privileged instructions.  The
"overhead" of checking a bitmap (or some other kernel structure) in
software is as such negligible.

	eSk