bug in segment_t::insert_entry (ppc64)
Tom Bachmann <[email protected]>
| Newsgroups | gmane.comp.micro-kernel.l4.l4ka.general |
|---|---|
| Message-ID | <[email protected]> |
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi, looking at the pistachio code, I (think I) found a (minor) bug in kernel/include/arch/powerpc64/slb.h, at line 145 (in segment_t::insert_entry): 142 __asm__ __volatile__( 143 "slbmfee %0,%1" /* Move from SLB entry, ESID */ 144 : "=r" (entry.esid) 145 : "r" (index) 146 ); should be 145 : "r" (index << 51) At least, [1] says "the SLB entry specified by bits 52:63" (p. 44), or do I misunderstand that? [1] PowerPC Operating Environment Architecture, Book, III Version 2.01 - -- - -ness- -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.2.2 (GNU/Linux) iD8DBQFE7LP+vD/ijq9JWhsRAvN5AJsEj/lvXDbi5/4kU63D5QmtBYqp2ACdG4UK HnmAC6NRk7E/AoimnLMA808= =LGCa -----END PGP SIGNATURE-----