Legacy 8259 PIC driver questions

Hello!

While implementing PIC support for my diploma thesis project, I took a look at the L4Ka PIC code, and stumbled upon a few things I do not fully understand. If someone could clear this up for me, that would be really nice. Thanks.

* I have read that edge-triggering causes problems with PCI interrupt sharing, specifically in the following case:
  1. device 1 asserts interrupt line
  2. kernel schedules interrupt handler for device 2 first
  3. device 2 wants to signal interrupt, line is still asserted (==> no edge)
  4. kernel schedules interrupt handler for device 1
  5. interrupt handler for device 1 causes device 1 to deassert interrupt line, but line stays asserted due to device 2
  ==> interrupt handler for device 2 is not executed again after the interrupt happened
  (==> no further interrupts on that line, ever?)

Is this correct? Since L4Ka uses edge triggering, does this mean that interrupts cannot be shared in legacy PIC mode? Or do the masking and unmasking operations performed by L4Ka count as edges, too?

* I've seen that L4Ka always masks interrupts until the user-level handler sends its reply, but immediately sends a specific EOI. Would there be any difference in behavior if Auto-EOI mode was enabled?

* According to the 8259A specification, masking an interrupt does not permit lower-priority interrupts to come in, unless Special Mask Mode is enabled. Does this mean that if, say, the IRQ 1 handler never returns, all interrupts except IRQ 0 are blocked?

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Best regards,
Sebastian Reichelt