(unknown)

Hi:
I am trying to understand how kernel memory is handled in L4. I read a few articles but i can not understand how to obtain space for processor structures for paging. The UTCB concept is more comprensible to me. However how are stored TCB? Not UTCB.
On x86 processors, how L4 handles page directories and page tables for every address space?
How L4 keeps them?
I read for instance:
"On microkernel construction"
"User-Level Management of Kernel Memory"

Thank,
Inti

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Universidad Central "Marta Abreu" de Las Villas. http://www.uclv.edu.cu