Pistachio IPC performance on Bare Metal

Hello,

My name is Matt Scaperoth and I am currently working on benchmarking your sy=
stem. I first want to say how much I have enjoyed working with your API. It i=
s extremely convenient to do things like find out which processor a thread i=
s running on or getting the current clock cycles.=20

I have been working on Pistachio as well as seL4 and am trying to get the cl=
ock cycles for different IPCs including cross socket. I'm especially interes=
ted in the scalability of Pistachio.

You can see the progress I've made on GitHub at http://github.com/scaperoth/=
pistachio-qemu.

I have been able to build my own custom modules to place into the image (myp=
ingpong). I have also been able to create a bootable usb from this image, bu=
t the problem is the cycle time I receive from these tests. The specific con=
figuration I am using can be seen in my README.md on the github page.

On bare metal I am getting an intra-as IPC time of around 1500 cycles (which=
 I know is way off). The system I tested on is a simple dual core dell compu=
ter. I can give more details on this if necessary.=20

My question really is how to optimize. I would like to get intra process IPC=
 down to < 200 cycles, but I've sort of hit a wall. I do have fast path enab=
led and debugging disabled. The code I altered was pingpong and I simply rem=
oved the loops and message register iteration so that I could perform a sing=
le IPC. I wrapped the IPC call with two variables that catch the clock time b=
efore and after the IPC. I do this several thousand times and take an averag=
e.=20

Any ideas on what I am doing wrong?

Regards,

Matt Scaperoth
GWU=