Help with new test case.

Hi,

I'm trying to add a test case in the form of a new entry in examples/c.

The test case is a "build scenario": a small version of a program that
is built a certain way, with its own Makefile. I prepared
everything stand-alone; I'm just integrating it into the tree.

I need the "local.mk" to execute my "Makefile", and not try to
build (what it thinks are) the deliverables itself.

What is the way to do that? Is there a way to pass control to that 
Makefile,
with the needed variables handed down, like $(CC) and $(BISON).

I am not familiar with any of the conventions used in the local.mk
files.

I am getting this error:

make[3]: 'examples/c/rpcalc/rpcalc' is up to date.
make[3]: *** No rule to make target 
'examples/c/buildscenario/buildscenario.c', needed by 
'examples/c/buildscenario/examples_c_buildscenario_buildscenario-buildscenario.o'.  Stop.

This is due to some fragments that get generated by Automake or
something. I have no such source file, and did not declare one
anywhere.

My Makefile is below. What content do I stuff into local.mk to make
it work?

Makefile:

# This Makefile is designed to be simple and readable.  It does not
# aim at portability.  It requires GNU Make.
BASE = buildscenario

CFLAGS += -W -Wall -ansi -pedantic \
           -Werror=implicit-function-declaration \
           -Werror=missing-prototypes \
           -Werror=strict-prototypes
BISON = bison --yacc
ifneq (BISON,byacc)
BISONFLAGS += -Wno-deprecated
endif

CLEANFILES = $(BASE) main.o y.tab.o y.tab.h y.tab.c y.output

$(BASE): main.o y.tab.o
     $(CC) -o $@ $^

run: $(BASE)
     @echo "This program doesn't do anything."
     ./$<

y.tab.c: parser.y
     $(BISON) $(BISONFLAGS) -v -d $<
     # workaround for Bison 3.x: yyparse declared in y.tab.h
ifneq (BISON,byacc)
     sed -e /yyparse/d < y.tab.h > y.tab.h.tmp
     mv y.tab.h.tmp y.tab.h
endif

main.o: parser.h

y.tab.o: parser.h y.tab.h

clean:
     -rm -f $(CLEANFILES)