[Gc] Fwd: Re: AArch64: Shareability domain for dm b st overly conservative (#11)

 Forwarding to ML..

From: Ivan Maidanski <[email protected]>
To: Yvan Roux <[email protected]>, Hans Boehm <[email protected]>
CC: ivmai/libatomic_ops <[email protected]>, ivmai/libatomic_ops <reply+i-46004519-50324839f75648d459559128d780ac126d37fdde-460469@reply.github.com>, Boehm GC <[email protected]>
Date: Thu, 23 Oct 2014 12:36:39 +0400
Subject: Re: [libatomic_ops] AArch64: Shareability domain for dmb st overly conservative (#11)

Hi Yvan and Hans,

Is the proposed change correct for ARM64 AO_nop_write? What's about 32-bit ARM?

Thank you

Thu, 16 Oct 2014 09:08:26 -0700 from stevecapperlinaro <[email protected]>:
>Hello,
>In src/atomic_ops/sysdeps/gcc/aarch64.h, we have the following code:
>__asm__ __volatile__("dmb st" : : : "memory");
>This will target the system domain and thus be overly conservative as the CPUs will occupy the inner shareable domain.
>Could this please be changed to:
>__asm__ __volatile__("dmb ishst" : : : "memory");
>That way the barriers will occupy the inner shareable domain.
>Thanks,
>Steve Capper
>—
>


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