Re: bitbake recipes to build myhdl, xstools, iverilog and gtkwave using Yocto

On 07/31/2015 8:02 AM, Edward Vidal wrote:
> Hi Jeremy,
> If the synthesis tool is the goal not
> many boards running Linux don't fit the bill.
> Xilinx and Altera have the market
>  for the synthesis and bit file generation.

Hey, Ed, this made me think. What if you had a StickIt! motherboard with 
a Lattice ICE40 FPGA, SDRAM and a serial flash instead of the XuLA 
connector? Could you run the open source ICE40 synthesizer tools on the 
RPi? Then you would have a complete FPGA development environment on the 
RPi that could load the FPGA on the StickIt!.

>
> I started in Yocto before FPGAs since
>  I have worked in Linux for many years.
> I created images for the BeagleBoard,
> PandaBoard, BeagleBone, and ZedBoard using Yocto.
>
> My thinking was the ZedBoard was the answer at $395.00.
> Learning Linux and FPGAs takes
> quite an effort.  That is where MyHDL and Xess came.
> The XulA2 which comes in 2 verisons XulA2-LX9 or XulA2-LX25
>  The XulA2 at $69 StickIt!-MB $20 (for GPIO to Pi ) and Raspberry Pi 2 B
> at $35makes a low cost with a small foot print.
>
> Yocto which started in 2010 from Openembedded
> appears to be growing in users at the highest rate.
>
> If you just want Linux with Ethernet, USB, and HDMI
> it takes about 675MB image. This would need a mouse
> or touch screen HDI since it supports a virtual keyboard.
>
> Now if you want OpenCV with C920 camera support
> and kernel-dev xterm git
>  jasper gsl gsl-dev python-netserver python-pygtk
>  python-pygtk-dev python-numpy liba52 liba52-dev
>  libmad libmad-dev libmad-staticdev
>  chkconfig v4l-utils python-imaging parted
>  python-distribute python-pyrex python-pexpect
>  gperf tree libav libav-dev
>  x264 x264-dev libav libav-dev opencv opencv-samples
>  cmake opencv-apps python-opencv tcl tk
> The requires an image of 868.2 MB.
>
> I have the software for what I described on 32 GB
> running Debian on a Raspberry Pi 2 B.
>
> I think the next step is the Compute Module which is based
> on the RaspberryPi designs.  I also think that Yocto will
> be developing for that as well.  Most of the people at
> Yocto work for WindRiver which is an Intel company.
> Also Intel is buying Altera.
>
> GNURADIO and OpenCV are where the FPGA opportunites
> will be running some ARM processor.
> Let me know if you have any questions.
>
> Edward Vidal Jr.
> e-mail [email protected]
> 915-595-1613
>
>
>
> On Thursday, July 30, 2015 4:26 PM, Jeremy Herbert 
> <[email protected]> wrote:
>
>
> Hi Edward,
>
> Please forgive my ignorance, but isn't this ultimately limited as a 
> development tool because there is no synthesis tool on the rpi ?
>
> Thanks,
> Jeremy
> On Fri, 31 Jul 2015 at 2:04 am Edward Vidal <[email protected] 
> <mailto:[email protected]>> wrote:
>
>     Hi all,
>     Dave the current verison of Xstools is 6.0.15?
>     Current vesion of MyHDL is 1.0.0 is that correct?
>
>     My goal is create a Yocto image for the Raspberry Pi 2 B that
>     provides the necessary tools to use MyHdl with Xstools, Iverilog &
>     GTKwave.  The combo of RaspberryPi 2 B with a StickIt-MB & XulA2 
>     would make a great low-cost development tool for developing and
>     testing FPGAs.
>
>     I currently have a working core-image-sato that I can install
>     myhdl using python setup.py develop instead of  python setup.py
>     install.  I also can install Iverilog and GTKWave compiling from
>     source on the target.
>      I can ssh to the Raspberry Pi
>     ssh -Y 192.168.1.136
>     [email protected] <mailto:[email protected]>'s password:
>     root@raspberrypi2:~# python
>     Python 2.7.9 (default, Jul 26 2015, 21:01:54)
>     [GCC 4.9.3] on linux2
>     Type "help", "copyright", "credits" or "license" for more information.
>     >>> from myhdl import *
>     >>>
>
>     I can also download my repo
>     https://github.com/develone/jpeg-2000-test.git
>     Then cd into the jpeg-2000-test/ipython_fixbv.
>     Where I can execute python test_jpegEnc.py.
>     The above does a dwt on an image.
>     cd myhdl
>     git log
>     commit 0f106505cbf4047e6a6641b451b817615d48772f
>     Merge: c7d92c4 443024f
>     Author: jandecaluwe <[email protected] <mailto:[email protected]>>
>     Date:   Tue Jul 28 14:25:21 2015 +0200
>
>         Merge pull request #116 from jck/signamevisitor
>
>         prevent adding intbv to senslist of always_comb
>     cd iverilog
>     git log
>     commit d3bdc60201079eb22fe8506e951a57c95b19e28a
>     Author: Cary R <[email protected] <mailto:[email protected]>>
>     Date:   Wed Jul 22 00:27:13 2015 -0700
>
>         Correctly display events when dumping using the FST format
>
>         This patch is from Tony Bybell and fixes a segmentation fault
>     when dumping
>         an event to a FST file.
>
>     iverilog -h
>     Usage: iverilog [-ESvV] [-B base] [-c cmdfile|-f cmdfile]
>                     [-g1995|-g2001|-g2005] [-g<feature>]
>                     [-D macro[=defn]] [-I includedir] [-M depfile] [-m
>     module]
>                     [-N file] [-o filename] [-p flag=value]
>                     [-s topmodule] [-t target] [-T min|typ|max]
>                     [-W class] [-y dir] [-Y suf] source_file(s)
>
>     See the man page for details.
>
>     gtkwave -v
>     Gtk-Message: Failed to load module "canberra-gtk-module"
>
>     GTKWave Analyzer v3.3.65 (w)1999-2015 BSI
>
>     I am in the process of creating the recipes to install the above
>     tools on the image.
>     The process that I am using is found at
>     https://github.com/develone/raspberrypi2_yocto.git
>
>     I am using an AMD 6 core with 16 GB and takes about 2 hours to
>     create the image.
>
>     If you have any questions
>     Edward Vidal Jr.
>     e-mail [email protected] <mailto:[email protected]>
>     915-595-1613
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>
>


-- 
------------------------------------------------------------------------
Dave Vandenbout / XESS Corp.
2608 Sweetgum Drive
Apex NC 27539-8851
USA
/[email protected]/
/www.xess.com/
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