Re: vhdl to verilog

Christopher Felton <[email protected]>
Newsgroups gmane.comp.python.myhdl
Message-ID <[email protected]>
On 8/28/15 7:43 AM, Edward Vidal wrote:
> Hello all,
> While looking for tool to convert VHDL to Verilog for simulation with
> Iverilog & myhdl I found what appears to work.
> http://www.ocean-logic.com/downloads.htm
> I downloaded with the following wget
> http://www.ocean-logic.com/pub/vhd2vl2.tgz
> Just follow the README.txt.

A small write-up, how I used vhd2vl to convert
the open-cores JPEG encoder from VHDL to Verilog.
http://www.fpgarelated.com/showarticle/718.php

Regards,
Chris


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