Re: Conversion error: Type mismatch with earlier assignment

On 9/3/15 6:29 AM, Guy Eschemann wrote:
> Hi,
>
> I wonder whether it would be possible to make error messages like the
> following one a bit more verbose:
>
> myhdl.ConversionError: in file
> E:\Projects\XXX\XXX\hg_hw\python\byte_align_resumable.py, line 58:
>      Type mismatch with earlier assignment: out_byte_idx_v
>
> Maybe print a list of the earlier assignments, along with the
> corresponding type information. That could make debugging such issues a
> bit easier.
>

What might be a little easier, is to add a "little"
static analysis to the decorators.  At that point
a "warning" message could be supplied.

But this could get ugly, at this point I don't
know if this would generate many superfluous
warnings (like many of the existing FPGA tools).

Another common error (and sometimes hard to debug)
is when folks mix `bool` and `intbv()[1:]`.

Regards,
Chris



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