Re: tools for the Lattice ICE-40 FPGA.

On 9/14/2015 12:30 PM, Edward Vidal wrote:
> Hi all, I just completed  building the tools (Yosys, arachne-pnr, and
> icebox)  for the Lattice ICE-40.   It appears this will fit on a 4GB
> SD card.
 >
> With the board that XESS is making this will be a standalone
> HDL development system with GTKWave, XSTOOLs, Iverilog,
> arachne-pnr(place and route), Yosys (Yosys is a framework for Verilog
> RTL synthesis), icebox(this will not be needed since XESS is going to
> push the bit file with GPIO instead of USB), and MyHDL.These were
> built on a custom image for the Raspberry Pi 2 B with Yocto.

Do you have any benchmarks how long a small design takes
to go through the complete toolflow on the R2?

Regards,
Chris


------------------------------------------------------------------------------