Re: Contribute to MyHDL through GSOC.

On 1/11/2016 11:02 AM, Nagabhushan Baddi wrote:
>      The project DDR3 controller is quite interesting and I would love to
> contribute to this project. Since the project requires familiarity with
> Verilog, Python and digital design, this should be a challenging and
> interesting project experience for me.
>
>      I am going through the MyHDL docs and the sample examples and quite got
> acquainted with. I would love to hear from the mentors and other developers
> and get help for me to get started.
>

Hello Nagabhushan,

Welcome and thanks for the interest.  Last year we participated
as a sub-org under PSF.  The plan this year is the same.
It will probably be a month before everyone has their pages
updated but you can view what is posted now.

MyHDL page: http://dev.myhdl.org/gsoc_2016.html
PSF page: https://wiki.python.org/moin/SummerOfCode/2016
GsoC page: https://www.google-melange.com/

In addition to the manual and examples you can review last years
GSoC SDRAM project: https://github.com/udara28/SDRAM_Controller

Any MyHDL specific questions we can help with, you can also
discuss with others on IRC (#myhdl on freenode[1]) and gitter[2]

Regards,
Chris

[1] https://freenode.net/
[2] https://gitter.im/jandecaluwe/myhdl



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