stm32h7: update linker scripts for ELF boot

commit 98990df08ffe18088b32fc9b7e91cdf150f60a90
Author: Aidan MacDonald <[email protected]>
Date:   Thu Jan 22 13:42:05 2026 +0000

    stm32h7: update linker scripts for ELF boot
    
    Use flash & AXI SRAM for the bootloader, ITCM/DTCM and
    SDRAM for Rockbox. Hardly the most optimal use of SRAMs
    but it's good enough to get started.
    
    Fixes the Echo R1 app build, which wasn't fitting in
    AXI SRAM.
    
    Change-Id: I4f7e5f618d27b553e5ff8dec1d5c4c61ac9d8eb0

diff --git a/firmware/target/arm/stm32/app.lds b/firmware/target/arm/stm32/app.lds
index eb19050a07..1fbcd140cd 100644
--- a/firmware/target/arm/stm32/app.lds
+++ b/firmware/target/arm/stm32/app.lds
@@ -1,67 +1,25 @@
 #include "cpu.h"
 
-/*
- * TODO: this is temporary and has not been tested
- */
-
-ENTRY(main)
+ENTRY(crt0_start)
 OUTPUT_FORMAT(elf32-littlearm)
 OUTPUT_ARCH(arm)
 STARTUP(target/arm/stm32/crt0-stm32h7.o)
 
 MEMORY
 {
-    SRAM_AXI (rwx) : ORIGIN = STM32_SRAM_AXI_BASE,    LENGTH = STM32_SRAM_AXI_SIZE
-    DTCM     (rwx) : ORIGIN = STM32_DTCM_BASE,        LENGTH = STM32_DTCM_SIZE
-    ITCM     (rwx) : ORIGIN = STM32_ITCM_BASE,        LENGTH = STM32_ITCM_SIZE
-    SDRAM    (rwx) : ORIGIN = STM32_SDRAM1_BASE,      LENGTH = MEMORYSIZE * 1024 * 1024
-}
-
-/*
- * to control section alignment (only affects on-disk alignment):
- * -Wl,-z,max-page-size=0x1
- */
-
-PHDRS
-{
-    sram_rx PT_LOAD ;
-    sram_ro PT_LOAD ;
-    sram_rw PT_LOAD ;
-    itcm PT_LOAD ;
-    dtcm PT_LOAD ;
-    sdram_rx PT_LOAD ;
-    sdram_rw PT_LOAD ;
+    DTCM  (rw)  : ORIGIN = STM32_DTCM_BASE,   LENGTH = STM32_DTCM_SIZE
+    ITCM  (rx)  : ORIGIN = STM32_ITCM_BASE,   LENGTH = STM32_ITCM_SIZE
+    SDRAM (rwx) : ORIGIN = STM32_SDRAM1_BASE, LENGTH = MEMORYSIZE * 1024 * 1024
 }
 
 SECTIONS
 {
-    .text :
-    {
-        loadaddress = .; /* only needed to keep ROLO happy */
-
-        *(.init*)
-        *(.text*)
-    } > SRAM_AXI :sram_rx
-
-    .rodata :
-    {
-        *(.rodata*)
-    } > SRAM_AXI :sram_ro
-
-    .data :
-    {
-        _databegin = .;
-        *(.data*)
-        _dataend = .;
-    } > SRAM_AXI :sram_rw
-    _datacopy = LOADADDR(.data);
-
     .itext :
     {
-        KEEP(*(.vectors.arm))
-        KEEP(*(.vectors.platform))
+        KEEP(*(.vectors.arm));
+        KEEP(*(.vectors.platform));
         *(.icode*);
-    } > ITCM :itcm
+    } > ITCM
 
     .stack (NOLOAD) :
     {
@@ -72,9 +30,25 @@ SECTIONS
         stackbegin = .;
         . += 0x2000;
         stackend = .;
+    } > DTCM
+
+    .text :
+    {
+        loadaddress = .; /* only needed to keep ROLO happy */
 
-        *(.stack);
-    } > DTCM :dtcm
+        *(.init*);
+        *(.text*);
+    } > SDRAM
+
+    .rodata :
+    {
+        *(.rodata*);
+    } > SDRAM
+
+    .data :
+    {
+        *(.data*);
+    } > SDRAM
 
     .bss (NOLOAD) :
     {
@@ -82,7 +56,7 @@ SECTIONS
         *(.bss*);
         *(COMMON);
         _bssend = .;
-    } > SDRAM :sdram_rw
+    } > SDRAM
 
     audiobuffer = ALIGN(32);
     audiobufend = ORIGIN(SDRAM) + LENGTH(SDRAM) - CODEC_SIZE - PLUGIN_BUFFER_SIZE;
diff --git a/firmware/target/arm/stm32/boot.lds b/firmware/target/arm/stm32/boot.lds
index 018b8742d2..0994787666 100644
--- a/firmware/target/arm/stm32/boot.lds
+++ b/firmware/target/arm/stm32/boot.lds
@@ -7,26 +7,29 @@ STARTUP(target/arm/stm32/crt0-stm32h7.o)
 
 MEMORY
 {
-    SRAM_AXI (rwx) : ORIGIN = STM32_SRAM_AXI_BASE,    LENGTH = STM32_SRAM_AXI_SIZE
-    DTCM     (rwx) : ORIGIN = STM32_DTCM_BASE,        LENGTH = STM32_DTCM_SIZE
-    FLASH1   (rx)  : ORIGIN = STM32_FLASH_BANK1_BASE, LENGTH = STM32_FLASH_BANK1_SIZE
+    SRAM_AXI (rw) : ORIGIN = STM32_SRAM_AXI_BASE,    LENGTH = STM32_SRAM_AXI_SIZE
+    FLASH1   (rx) : ORIGIN = STM32_FLASH_BANK1_BASE, LENGTH = STM32_FLASH_BANK1_SIZE
 }
 
 SECTIONS
 {
     .text :
     {
-        KEEP(*(.vectors.arm))
-        KEEP(*(.vectors.platform))
-        *(.init*)
-        *(.text*)
-        *(.rodata*)
+        KEEP(*(.vectors.arm));
+        KEEP(*(.vectors.platform));
+        *(.init*);
+        *(.text*);
+    } > FLASH1
+
+    .rodata :
+    {
+        *(.rodata*);
     } > FLASH1
 
     .data :
     {
         _databegin = .;
-        *(.data*)
+        *(.data*);
         _dataend = .;
     } > SRAM_AXI AT> FLASH1
     _datacopy = LOADADDR(.data);
@@ -48,9 +51,7 @@ SECTIONS
         stackbegin = .;
         . += 0x2000;
         stackend = .;
-
-        *(.stack);
-    } > DTCM
+    } > SRAM_AXI
 }
 
 EXTERN(__vectors_arm);
-- 
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