x1000: ensure sections are 4-byte aligned

rockbox-gerrit-noreply--- via rockbox-cvs <[email protected]>
Newsgroups gmane.comp.systems.archos.rockbox.cvs
Message-ID <[email protected]>
commit 828fd7941f4605869149afe95206c8e050b1eb0c
Author: Aidan MacDonald <[email protected]>
Date:   Mon Feb 2 20:50:05 2026 +0000

    x1000: ensure sections are 4-byte aligned
    
    The section copy loops in crt0.S rely on sections starting
    and ending on 4-byte aligned addresses. If the last variable
    alloacted in the BSS section isn't a multiple of 4 bytes,
    then _bssend can get misaligned and break the copy loop.
    
    This problem was masked by -fcommon since COMMON variables
    go at the end of the BSS section, and they were for the most
    part a multiple of 4 bytes. The switch to -fno-common broke
    the bootloader because with COMMON gone, the last thing in
    BSS was a 1-byte variable in led.o. The main binary appears
    to have had the correct alignments by sheer luck.
    
    Change-Id: I21ee3653d89d1607a2f458c457f1a51e33c22f05

diff --git a/firmware/target/mips/ingenic_x1000/app.lds b/firmware/target/mips/ingenic_x1000/app.lds
index a1e84fb9cf..1df0295d63 100644
--- a/firmware/target/mips/ingenic_x1000/app.lds
+++ b/firmware/target/mips/ingenic_x1000/app.lds
@@ -71,11 +71,11 @@ SECTIONS
      * The following sections are loaded after normal DRAM sections
      * but are copied elsewhere by the startup code.
      */
-    _noloaddram = .;
+    _noloaddram = ALIGN(4);
 
     .iram :
     {
-        _iramstart = .;
+        _iramstart = ALIGN(4);
         . = 0x000; /* TLB refill */
         KEEP(*(.vectors.1));
         . = 0x100; /* Cache error */
@@ -89,24 +89,24 @@ SECTIONS
         *(.icode*);
         *(.irodata);
         *(.idata);
-        _iramend = .;
+        _iramend = ALIGN(4);
     } > IRAM AT> DRAM
     _iramcopy = LOADADDR(.iram);
 
     .tcsm :
     {
-        _tcsmstart = .;
+        _tcsmstart = ALIGN(4);
         KEEP(*(.tcsm*));
-        _tcsmend = .;
+        _tcsmend = ALIGN(4);
     } > TCSM AT> DRAM
     _tcsmcopy = LOADADDR(.tcsm);
 
 #ifdef HAVE_INIT_ATTR
     .init :
     {
-        _initstart = .;
+        _initstart = ALIGN(4);
         *(.init*);
-        _initend = .;
+        _initend = ALIGN(4);
     } > INIT AT> DRAM
     _initcopy = LOADADDR(.init);
 #endif
@@ -117,22 +117,22 @@ SECTIONS
     .stack (NOLOAD) :
     {
          *(.stack);
-         stackbegin = .;
+         stackbegin = ALIGN(4);
          . += X1000_STACKSIZE;
-         stackend = .;
-         _irqstackbegin = .;
+         stackend = ALIGN(4);
+         _irqstackbegin = ALIGN(4);
          . += X1000_IRQSTACKSIZE;
-         _irqstackend = .;
+         _irqstackend = ALIGN(4);
     } > IRAM
 
     .bss _noloaddram (NOLOAD) :
     {
-        _bssbegin = .;
+        _bssbegin = ALIGN(4);
         *(.sbss*);
         *(.bss*);
         *(COMMON);
         *(.scommon*);
-        _bssend = .;
+        _bssend = ALIGN(4);
         _end = .;
     } > DRAM
 
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