Re: [PATCH] Add riscv-sim.exp

On 7/22/2020 8:53 AM, Rob Savoye wrote:
> On 7/21/20 11:02 PM, Kito Cheng wrote:
>
>> Remote protocols need a port which means it's harder to parallel
>> testing in a single machine,
>> but I guess it could add some mechanism to randomly pick a port to prevent that.
>    Actually that's supported for the remote protocol, it increments the
> port if it's already being used.
>
>> So currently I prefer using simple qemu wrapper or gdb sim to run gcc
>> testsuite :P
>    GCC testing is easy, there's no protocol to worry about, and QEMU
> works fine. GDB testing is much more complicated. While SIM works fine,
> I think QEMU is potentially more accurate for validation.

For RTEMS, we are also using Spike and SIS. You might remember SIS as
the SPARC simulator in gdb. Jiri Gaisler has done a significant work on 
it and
it now supports multi-core Leons and RISC-V and is a standalone simulator
with remote gdb rather than being in gdb.

Spike: https://github.com/riscv/riscv-isa-sim
SIS: https://git.rtems.org/jiri/sis.git/

--joel
>
> 	- rob -
>