Re: Writing .cpu file for Z80
"Frank Ch. Eigler" <[email protected]> Sat, 22 Feb 2020 19:03:17 -0500
| Newsgroups | gmane.comp.tools.cgen.devel |
|---|---|
| Message-ID | <[email protected]> |
Hi - > About sufficies. Short sufficies (.s, .l, .is, .il) should be converted to > the full one by assembler using ADL (acronim for address & data long) mode > state, which is set by programmer (command line options or directive > .assume ADL=1 or .assume ADL=0), so these short sufficies cannot be just > brutforced... Aha. If it were just an operand field, a parser could be stateful and fill that in. If it's a whole different opcode prefix/pattern, then a larger custom parser. Try things :-) > Another question. Z80 instruction set uses same mnemonic for completely > different (comparing to other cpus) instructions: > LD A,n ; 8-bit load immediate > LD HL,nn ; 16-bit load immediate > LD A,(nn) ; 8-bit direct memory load > LD (IX+5),A ;8-bit indirect indexed memory store > LD (nn),HL ;16-bit direct memory store... > Can it cause ASM parser issues? I believe there is precedent for different addressing modes with the same mnemonic to result in different opcodes. Sorry I'm not fresh enough with the code base to point them out, but there are a couple of mechanisms. cgen's assembler / disassembler interfaces are hookable enough that you can generally make things work even if the abstract cgen model is not quite enough. - FChE