Re: BUG: non-fixed-length ISAs are unsupported for now

Sergey Belyashov via Cgen <[email protected]> Wed, 12 Aug 2020 22:19:43 +0300
Newsgroups gmane.comp.tools.cgen.devel
Message-ID <CAOe0RDyi+mPUtqkcFuP7d80QS4+on=ogjhrP3VYA-iafUsRS8Q@mail.gmail.com>
But Zilog eZ80 CPU has instructions up to 6 bytes long: like ld.il bc,(Mmn)
(lil/sil prefix 0xed prefix <opcode> <n> <m> <M>) .

ср, 12 авг. 2020 г., 21:53 Jose E. Marchesi <[email protected]>:

>
> >> I have tried it. Result is the same: ifields are just added (part of
> >> generated z80-opc.c):
> >
> > I'm unfortunately unable to actually run cgen here (apparent
> > incompatibility with "new" fedora32-level guile), so am only guessing
> > that you could try setting the cpu base-insn-size to 16 or even 32:
> > enough bits to tell the instructions apart.
>
> That looks like the right approach.
>
> Currently CGEN does not support having opcodes (constant fields) past
> the base part of the insn, which by the way is limited to a maximum of
> 32-bit.