Re: [PATCH v2] accel/rocket: request the core clocks by name

Sidong Yang <[email protected]>
Newsgroups gmane.linux.kernel,gmane.comp.video.dri.devel,gmane.linux.ports.arm.rockchip
Message-ID <[email protected]>
On Wed, Jul 29, 2026 at 03:07:43PM +0200, Igor Paunovic wrote:
> Found on an Orange Pi 5 Plus (RK3588) by reading the live clock tree:

I see the same thing on a Radxa ROCK 5B+ (RK3588), and the patch fixes
it here as well.

Before, clk_summary has the four rocket handles piled up on the AXI
clock, with no driver consumer at all on the other three:

  aclk_npu0       4x fdab0000.npu    1x npu@fdab0000
  hclk_npu0        -                 1x npu@fdab0000
  pclk_npu_root    -                 3x npu@fdXX0000
  scmi_clk_npu     -                 3x npu@fdXX0000

After the patch every clock has exactly one fdXX0000.npu consumer, and
scmi_clk_npu picks up driver handles for all three cores.

No regressions here:

 - 90 runtime PM suspend/resume cycles over the three cores: no
   power-domain ack failures, no SErrors, nothing logged at all.
   scmi_clk_npu stays at its boot rate and returns to enable_cnt 0
   when the cores go idle.

 - Five MobileNetV2 subgraphs through the Teflon TFLite delegate still
   match the CPU reference (max diff 1).  I could not measure any change
   in inference time either way, though run-to-run spread on this box is
   around 10%, so that only rules out a large regression.

Tested on v7.2-rc3.

Tested-by: Sidong Yang <[email protected]>

Thanks,
Sidong
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