drm: Branch 'master' - 7 commits

[email protected] (Emil Velikov)
Newsgroups gmane.comp.video.dri.patches
Message-ID <[email protected]> 
 amdgpu/amdgpu.h                   |    4 ++--
 exynos/exynos_drm.c               |    2 +-
 freedreno/kgsl/kgsl_drm.h         |    2 +-
 freedreno/kgsl/msm_kgsl.h         |    4 ++--
 include/drm/tegra_drm.h           |    3 ++-
 intel/intel_bufmgr_fake.c         |    2 +-
 intel/intel_bufmgr_gem.c          |    2 +-
 intel/intel_decode.c              |    2 +-
 intel/tests/gen5-3d.batch-ref.txt |    2 +-
 intel/tests/gen6-3d.batch-ref.txt |    2 +-
 tests/amdgpu/basic_tests.c        |    6 +++---
 xf86drm.c                         |    2 +-
 xf86drmMode.c                     |    2 +-
 13 files changed, 18 insertions(+), 17 deletions(-)

New commits:
commit 65ea85d85c5b4da22d9f4ea18ae368bc48fbf60a
Author: Thierry Reding <[email protected]>
Date:   Thu Mar 31 12:41:10 2016 +0200

    tegra: Sync with Linux kernel UAPI header
    
    Update the UAPI header to the latest version in the Linux kernel. This
    changes the struct drm_tegra_gem_mmap to properly handle offsets on 64-
    bit architectures.
    
    See commit bdf765071a8b ("drm/tegra: gem: Return 64-bit offset for
    mmap(2)") in the Linux kernel (as of v4.1).
    
    Signed-off-by: Thierry Reding <[email protected]>
    Reviewed-by: Daniel Vetter <[email protected]>
    Reviewed-by: Emil Velikov <[email protected]>

diff --git a/include/drm/tegra_drm.h b/include/drm/tegra_drm.h
index 8dae8f3..7c0fe0e 100644
--- a/include/drm/tegra_drm.h
+++ b/include/drm/tegra_drm.h
@@ -36,7 +36,8 @@ struct drm_tegra_gem_create {
 
 struct drm_tegra_gem_mmap {
 	__u32 handle;
-	__u32 offset;
+	__u32 pad;
+	__u64 offset;
 };
 
 struct drm_tegra_syncpt_read {
commit ce97507cfcbdbdc520872417b5605f3b807794ff
Author: Eric Engestrom <[email protected]>
Date:   Sun Apr 3 19:48:12 2016 +0100

    xf86drm: Fix spelling mistakes
    
    Signed-off-by: Eric Engestrom <[email protected]>
    Reviewed-by: Emil Velikov <[email protected]>

diff --git a/xf86drm.c b/xf86drm.c
index 5f587d9..45aa5fc 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -2942,7 +2942,7 @@ static int drmGetMaxNodeName(void)
            MAX3(sizeof(DRM_PRIMARY_MINOR_NAME),
                 sizeof(DRM_CONTROL_MINOR_NAME),
                 sizeof(DRM_RENDER_MINOR_NAME)) +
-           3 /* lenght of the node number */;
+           3 /* length of the node number */;
 }
 
 static int drmParsePciDeviceInfo(const char *d_name,
diff --git a/xf86drmMode.c b/xf86drmMode.c
index 7710061..f7b5948 100644
--- a/xf86drmMode.c
+++ b/xf86drmMode.c
@@ -34,7 +34,7 @@
  */
 
 /*
- * TODO the types we are after are defined in diffrent headers on diffrent
+ * TODO the types we are after are defined in different headers on different
  * platforms find which headers to include to get uint32_t
  */
 
commit 96f2907c85097a1e85a56e7e343893cf2b93f432
Author: Eric Engestrom <[email protected]>
Date:   Sun Apr 3 19:48:11 2016 +0100

    tests: Fix spelling mistakes
    
    Signed-off-by: Eric Engestrom <[email protected]>
    Reviewed-by: Emil Velikov <[email protected]>

diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 4ef6014..599c090 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -803,7 +803,7 @@ static void amdgpu_command_submission_write_linear_helper(unsigned ip_type)
 
 		resources[0] = bo;
 
-		/* fullfill PM4: test DMA write-linear */
+		/* fulfill PM4: test DMA write-linear */
 		i = j = 0;
 		if (ip_type == AMDGPU_HW_IP_DMA) {
 			pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE,
@@ -902,7 +902,7 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type)
 
 		resources[0] = bo;
 
-		/* fullfill PM4: test DMA const fill */
+		/* fulfill PM4: test DMA const fill */
 		i = j = 0;
 		if (ip_type == AMDGPU_HW_IP_DMA) {
 			pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0,
@@ -1020,7 +1020,7 @@ static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type)
 			resources[0] = bo1;
 			resources[1] = bo2;
 
-			/* fullfill PM4: test DMA copy linear */
+			/* fulfill PM4: test DMA copy linear */
 			i = j = 0;
 			if (ip_type == AMDGPU_HW_IP_DMA) {
 				pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0);
commit 723a6944c0ba8f6b25302adbea40b9d662f7b8ea
Author: Eric Engestrom <[email protected]>
Date:   Sun Apr 3 19:48:09 2016 +0100

    intel: Fix spelling mistakes
    
    Signed-off-by: Eric Engestrom <[email protected]>
    Reviewed-by: Emil Velikov <[email protected]>

diff --git a/intel/intel_bufmgr_fake.c b/intel/intel_bufmgr_fake.c
index 7f4c7b9..24b3732 100644
--- a/intel/intel_bufmgr_fake.c
+++ b/intel/intel_bufmgr_fake.c
@@ -312,7 +312,7 @@ _fence_wait_internal(drm_intel_bufmgr_fake *bufmgr_fake, int seq)
 	 *
 	 * Assume that in userland we treat sequence numbers as ints, which
 	 * makes some of the comparisons convenient, since the sequence
-	 * numbers are all postive signed integers.
+	 * numbers are all positive signed integers.
 	 *
 	 * From this we get several cases we need to handle.  Here's a timeline.
 	 * 0x2   0x7                                    0x7ffffff8   0x7ffffffd
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index dc28200..0a4012b 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -3379,7 +3379,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
 	    bufmgr_gem->gtt_size > 256*1024*1024) {
 		/* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't
 		 * be used for tiled blits. To simplify the accounting, just
-		 * substract the unmappable part (fixed to 256MB on all known
+		 * subtract the unmappable part (fixed to 256MB on all known
 		 * gen3 devices) if the kernel advertises it. */
 		bufmgr_gem->gtt_size -= 256*1024*1024;
 	}
diff --git a/intel/intel_decode.c b/intel/intel_decode.c
index 287c342..803d202 100644
--- a/intel/intel_decode.c
+++ b/intel/intel_decode.c
@@ -3598,7 +3598,7 @@ decode_3d_965(struct drm_intel_decode *ctx)
 		instr_out(ctx, 0, "3DSTATE_DEPTH_BUFFER\n");
 		if (IS_GEN5(devid) || IS_GEN6(devid))
 			instr_out(ctx, 1,
-				  "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Seperate Stencil %d\n",
+				  "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Separate Stencil %d\n",
 				  get_965_surfacetype(data[1] >> 29),
 				  get_965_depthformat((data[1] >> 18) & 0x7),
 				  (data[1] & 0x0001ffff) + 1,
diff --git a/intel/tests/gen5-3d.batch-ref.txt b/intel/tests/gen5-3d.batch-ref.txt
index a0271ab..51dd85f 100644
--- a/intel/tests/gen5-3d.batch-ref.txt
+++ b/intel/tests/gen5-3d.batch-ref.txt
@@ -24,7 +24,7 @@
 0x1230005c:      0x00000000:    dword 3
 0x12300060:      0x00000000:    dword 4
 0x12300064:      0x79050004: 3DSTATE_DEPTH_BUFFER
-0x12300068:      0x2c0805ff:    2D, z24s8, pitch = 1536 bytes, tiled, HiZ 0, Seperate Stencil 0
+0x12300068:      0x2c0805ff:    2D, z24s8, pitch = 1536 bytes, tiled, HiZ 0, Separate Stencil 0
 0x1230006c:      0x00000000:    depth offset
 0x12300070:      0x09584ac0:    300x300
 0x12300074:      0x00000000:    volume depth
diff --git a/intel/tests/gen6-3d.batch-ref.txt b/intel/tests/gen6-3d.batch-ref.txt
index 9035663..04cbddc 100644
--- a/intel/tests/gen6-3d.batch-ref.txt
+++ b/intel/tests/gen6-3d.batch-ref.txt
@@ -140,7 +140,7 @@
 0x1230022c:      0x00000000:    
 0x12300230:      0x00000000:    
 0x12300234:      0x79050005: 3DSTATE_DEPTH_BUFFER
-0x12300238:      0x2c6c05ff:    2D, unknown, pitch = 1536 bytes, tiled, HiZ 1, Seperate Stencil 1
+0x12300238:      0x2c6c05ff:    2D, unknown, pitch = 1536 bytes, tiled, HiZ 1, Separate Stencil 1
 0x1230023c:      0x00000000:    depth offset
 0x12300240:      0x09584ac0:    300x300
 0x12300244:      0x00000000:    volume depth
commit 7b356f4b5e8e2aed4311291fffaff1e608fbf1d1
Author: Eric Engestrom <[email protected]>
Date:   Sun Apr 3 19:48:08 2016 +0100

    freedreno: Fix spelling mistakes
    
    Signed-off-by: Eric Engestrom <[email protected]>
    Reviewed-by: Emil Velikov <[email protected]>

diff --git a/freedreno/kgsl/kgsl_drm.h b/freedreno/kgsl/kgsl_drm.h
index f1c7f4e..281978e 100644
--- a/freedreno/kgsl/kgsl_drm.h
+++ b/freedreno/kgsl/kgsl_drm.h
@@ -81,7 +81,7 @@ struct drm_kgsl_gem_create_fd)
 /* Memory types - these define the source and caching policies
    of the GEM memory chunk */
 
-/* Legacy definitions left for compatability */
+/* Legacy definitions left for compatibility */
 
 #define DRM_KGSL_GEM_TYPE_EBI          0
 #define DRM_KGSL_GEM_TYPE_SMI          1
diff --git a/freedreno/kgsl/msm_kgsl.h b/freedreno/kgsl/msm_kgsl.h
index e67190f..5b36eeb 100644
--- a/freedreno/kgsl/msm_kgsl.h
+++ b/freedreno/kgsl/msm_kgsl.h
@@ -31,7 +31,7 @@
 #define KGSL_FLAGS_SOFT_RESET  0x00000100
 #define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200
 
-/* Clock flags to show which clocks should be controled by a given platform */
+/* Clock flags to show which clocks should be controlled by a given platform */
 #define KGSL_CLK_SRC	0x00000001
 #define KGSL_CLK_CORE	0x00000002
 #define KGSL_CLK_IFACE	0x00000004
@@ -295,7 +295,7 @@ struct kgsl_cmdstream_freememontimestamp {
 
 /* Previous versions of this header had incorrectly defined
    IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP as a read-only ioctl instead
-   of a write only ioctl.  To ensure binary compatability, the following
+   of a write only ioctl.  To ensure binary compatibility, the following
    #define will be used to intercept the incorrect ioctl
 */
 
commit caef42bdfa0cf69b4c4d8333644527c87effe1bf
Author: Eric Engestrom <[email protected]>
Date:   Sun Apr 3 19:48:07 2016 +0100

    exynos: Fix spelling mistake
    
    Signed-off-by: Eric Engestrom <[email protected]>
    Reviewed-by: Emil Velikov <[email protected]>

diff --git a/exynos/exynos_drm.c b/exynos/exynos_drm.c
index e689781..b961e52 100644
--- a/exynos/exynos_drm.c
+++ b/exynos/exynos_drm.c
@@ -347,7 +347,7 @@ exynos_prime_fd_to_handle(struct exynos_device *dev, int fd, uint32_t *handle)
  *
  * @dev: a exynos device object.
  * @connect: indicate whether connectoin or disconnection request.
- * @ext: indicate whether edid data includes extentions data or not.
+ * @ext: indicate whether edid data includes extensions data or not.
  * @edid: a pointer to edid data from Wireless Display device.
  *
  * this interface is used to request Virtual Display driver connection or
commit 0b3f9783df9c0aa2415765798d102ad4335bbe2a
Author: Eric Engestrom <[email protected]>
Date:   Sun Apr 3 19:48:06 2016 +0100

    amdgpu: Fix spelling mistakes
    
    Signed-off-by: Eric Engestrom <[email protected]>
    Reviewed-by: Christian König <[email protected]>
    Reviewed-by: Emil Velikov <[email protected]>

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 0851306..5d5a2c6 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -685,7 +685,7 @@ int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
 int amdgpu_bo_free(amdgpu_bo_handle buf_handle);
 
 /**
- * Request CPU access to GPU accessable memory
+ * Request CPU access to GPU accessible memory
  *
  * \param   buf_handle - \c [in] Buffer handle
  * \param   cpu        - \c [out] CPU address to be used for access
@@ -851,7 +851,7 @@ int amdgpu_cs_query_reset_state(amdgpu_context_handle context,
  * order.
  *
  * The caller can specify the user fence buffer/location with the fence_info in the
- * cs_request.The sequence number is returned via the 'seq_no' paramter
+ * cs_request.The sequence number is returned via the 'seq_no' parameter
  * in ibs_request structure.
  *
  *

------------------------------------------------------------------------------

--
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