drm: Branch 'master' - 2 commits
[email protected] (Christian Gmeiner)
| Newsgroups | gmane.comp.video.dri.patches |
|---|---|
| Message-ID | <[email protected]> |
.gitignore | 4 Makefile.am | 6 configure.ac | 17 etnaviv/Android.mk | 18 etnaviv/Makefile.am | 26 etnaviv/Makefile.sources | 12 etnaviv/etnaviv-symbol-check | 45 etnaviv/etnaviv_bo.c | 347 +++++++ etnaviv/etnaviv_bo_cache.c | 196 ++++ etnaviv/etnaviv_cmd_stream.c | 243 +++++ etnaviv/etnaviv_device.c | 96 ++ etnaviv/etnaviv_drm.h | 233 ++++ etnaviv/etnaviv_drmif.h | 188 ++++ etnaviv/etnaviv_gpu.c | 175 +++ etnaviv/etnaviv_pipe.c | 78 + etnaviv/etnaviv_priv.h | 199 ++++ etnaviv/libdrm_etnaviv.pc.in | 11 tests/Makefile.am | 4 tests/etnaviv/Makefile.am | 41 tests/etnaviv/cmdstream.xml.h | 242 +++++ tests/etnaviv/etnaviv_2d_test.c | 240 +++++ tests/etnaviv/etnaviv_bo_cache_test.c | 121 ++ tests/etnaviv/etnaviv_cmd_stream_test.c | 123 ++ tests/etnaviv/state.xml.h | 375 ++++++++ tests/etnaviv/state_2d.xml.h | 1497 ++++++++++++++++++++++++++++++++ tests/etnaviv/write_bmp.c | 151 +++ tests/etnaviv/write_bmp.h | 34 27 files changed, 4722 insertions(+) New commits: commit 0659558f6418693ad203b5de2f1bc4fa9f28708e Author: The etnaviv authors <[email protected]> Date: Tue Sep 6 18:16:02 2016 +0200 libdrm: add etnaviv tests This adds the following basic unit tests: - etnaviv_2d_test Let the 2D core render a defined pattern into a bo and store it as bmp. - etnaviv_bo_cache_test Basic tests to validate the bo-cache behavior. - etnaviv_cmd_stream_test Tests for the etna_cmd_stream API. Signed-off-by: Christian Gmeiner <[email protected]> Signed-off-by: Lucas Stach <[email protected]> diff --git a/.gitignore b/.gitignore index 3226b3a..d51e619 100644 --- a/.gitignore +++ b/.gitignore @@ -102,4 +102,7 @@ tests/radeon/radeon_ttm tests/exynos/exynos_fimg2d_event tests/exynos/exynos_fimg2d_perf tests/exynos/exynos_fimg2d_test +tests/etnaviv/etnaviv_2d_test +tests/etnaviv/etnaviv_cmd_stream_test +tests/etnaviv/etnaviv_bo_cache_test man/*.3 diff --git a/configure.ac b/configure.ac index 64f3e6c..330358a 100644 --- a/configure.ac +++ b/configure.ac @@ -551,6 +551,7 @@ AC_CONFIG_FILES([ tests/exynos/Makefile tests/tegra/Makefile tests/nouveau/Makefile + tests/etnaviv/Makefile tests/util/Makefile man/Makefile libdrm.pc]) diff --git a/tests/Makefile.am b/tests/Makefile.am index 58feb12..4a499e4 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -22,6 +22,10 @@ if HAVE_TEGRA SUBDIRS += tegra endif +if HAVE_ETNAVIV +SUBDIRS += etnaviv +endif + AM_CFLAGS = \ $(WARN_CFLAGS)\ -I $(top_srcdir)/include/drm \ diff --git a/tests/etnaviv/Makefile.am b/tests/etnaviv/Makefile.am new file mode 100644 index 0000000..0631864 --- /dev/null +++ b/tests/etnaviv/Makefile.am @@ -0,0 +1,41 @@ +AM_CFLAGS = \ + -I $(top_srcdir)/include/drm \ + -I $(top_srcdir)/etnaviv \ + -I $(top_srcdir) + +if HAVE_INSTALL_TESTS +bin_PROGRAMS = \ + etnaviv_2d_test \ + etnaviv_cmd_stream_test \ + etnaviv_bo_cache_test +else +noinst_PROGRAMS = \ + etnaviv_2d_test \ + etnaviv_cmd_stream_test \ + etnaviv_bo_cache_test +endif + +etnaviv_2d_test_LDADD = \ + $(top_builddir)/libdrm.la \ + $(top_builddir)/etnaviv/libdrm_etnaviv.la + +etnaviv_2d_test_SOURCES = \ + cmdstream.xml.h \ + etnaviv_2d_test.c \ + state.xml.h \ + state_2d.xml.h \ + write_bmp.c \ + write_bmp.h + +etnaviv_cmd_stream_test_LDADD = \ + $(top_builddir)/etnaviv/libdrm_etnaviv.la + +etnaviv_cmd_stream_test_SOURCES = \ + etnaviv_cmd_stream_test.c + +etnaviv_bo_cache_test_LDADD = \ + $(top_builddir)/libdrm.la \ + $(top_builddir)/etnaviv/libdrm_etnaviv.la + +etnaviv_bo_cache_test_SOURCES = \ + etnaviv_bo_cache_test.c diff --git a/tests/etnaviv/cmdstream.xml.h b/tests/etnaviv/cmdstream.xml.h new file mode 100644 index 0000000..109285c --- /dev/null +++ b/tests/etnaviv/cmdstream.xml.h @@ -0,0 +1,242 @@ +#ifndef CMDSTREAM_XML +#define CMDSTREAM_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +http://0x04.net/cgit/index.cgi/rules-ng-ng +git clone git://0x04.net/rules-ng-ng + +The rules-ng-ng source files this header was generated from are: +- cmdstream.xml ( 12621 bytes, from 2016-09-06 14:44:16) +- copyright.xml ( 1597 bytes, from 2016-09-06 14:44:16) +- common.xml ( 20583 bytes, from 2016-09-06 14:14:12) + +Copyright (C) 2012-2016 by the following authors: +- Wladimir J. van der Laan <[email protected]> +- Christian Gmeiner <[email protected]> +- Lucas Stach <[email protected]> +- Russell King <[email protected]> + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sub license, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. +*/ + + +#define FE_OPCODE_LOAD_STATE 0x00000001 +#define FE_OPCODE_END 0x00000002 +#define FE_OPCODE_NOP 0x00000003 +#define FE_OPCODE_DRAW_2D 0x00000004 +#define FE_OPCODE_DRAW_PRIMITIVES 0x00000005 +#define FE_OPCODE_DRAW_INDEXED_PRIMITIVES 0x00000006 +#define FE_OPCODE_WAIT 0x00000007 +#define FE_OPCODE_LINK 0x00000008 +#define FE_OPCODE_STALL 0x00000009 +#define FE_OPCODE_CALL 0x0000000a +#define FE_OPCODE_RETURN 0x0000000b +#define FE_OPCODE_CHIP_SELECT 0x0000000d +#define PRIMITIVE_TYPE_POINTS 0x00000001 +#define PRIMITIVE_TYPE_LINES 0x00000002 +#define PRIMITIVE_TYPE_LINE_STRIP 0x00000003 +#define PRIMITIVE_TYPE_TRIANGLES 0x00000004 +#define PRIMITIVE_TYPE_TRIANGLE_STRIP 0x00000005 +#define PRIMITIVE_TYPE_TRIANGLE_FAN 0x00000006 +#define PRIMITIVE_TYPE_LINE_LOOP 0x00000007 +#define PRIMITIVE_TYPE_QUADS 0x00000008 +#define VIV_FE_LOAD_STATE 0x00000000 + +#define VIV_FE_LOAD_STATE_HEADER 0x00000000 +#define VIV_FE_LOAD_STATE_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_LOAD_STATE_HEADER_OP__SHIFT 27 +#define VIV_FE_LOAD_STATE_HEADER_OP_LOAD_STATE 0x08000000 +#define VIV_FE_LOAD_STATE_HEADER_FIXP 0x04000000 +#define VIV_FE_LOAD_STATE_HEADER_COUNT__MASK 0x03ff0000 +#define VIV_FE_LOAD_STATE_HEADER_COUNT__SHIFT 16 +#define VIV_FE_LOAD_STATE_HEADER_COUNT(x) (((x) << VIV_FE_LOAD_STATE_HEADER_COUNT__SHIFT) & VIV_FE_LOAD_STATE_HEADER_COUNT__MASK) +#define VIV_FE_LOAD_STATE_HEADER_OFFSET__MASK 0x0000ffff +#define VIV_FE_LOAD_STATE_HEADER_OFFSET__SHIFT 0 +#define VIV_FE_LOAD_STATE_HEADER_OFFSET(x) (((x) << VIV_FE_LOAD_STATE_HEADER_OFFSET__SHIFT) & VIV_FE_LOAD_STATE_HEADER_OFFSET__MASK) +#define VIV_FE_LOAD_STATE_HEADER_OFFSET__SHR 2 + +#define VIV_FE_END 0x00000000 + +#define VIV_FE_END_HEADER 0x00000000 +#define VIV_FE_END_HEADER_EVENT_ID__MASK 0x0000001f +#define VIV_FE_END_HEADER_EVENT_ID__SHIFT 0 +#define VIV_FE_END_HEADER_EVENT_ID(x) (((x) << VIV_FE_END_HEADER_EVENT_ID__SHIFT) & VIV_FE_END_HEADER_EVENT_ID__MASK) +#define VIV_FE_END_HEADER_EVENT_ENABLE 0x00000100 +#define VIV_FE_END_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_END_HEADER_OP__SHIFT 27 +#define VIV_FE_END_HEADER_OP_END 0x10000000 + +#define VIV_FE_NOP 0x00000000 + +#define VIV_FE_NOP_HEADER 0x00000000 +#define VIV_FE_NOP_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_NOP_HEADER_OP__SHIFT 27 +#define VIV_FE_NOP_HEADER_OP_NOP 0x18000000 + +#define VIV_FE_DRAW_2D 0x00000000 + +#define VIV_FE_DRAW_2D_HEADER 0x00000000 +#define VIV_FE_DRAW_2D_HEADER_COUNT__MASK 0x0000ff00 +#define VIV_FE_DRAW_2D_HEADER_COUNT__SHIFT 8 +#define VIV_FE_DRAW_2D_HEADER_COUNT(x) (((x) << VIV_FE_DRAW_2D_HEADER_COUNT__SHIFT) & VIV_FE_DRAW_2D_HEADER_COUNT__MASK) +#define VIV_FE_DRAW_2D_HEADER_DATA_COUNT__MASK 0x07ff0000 +#define VIV_FE_DRAW_2D_HEADER_DATA_COUNT__SHIFT 16 +#define VIV_FE_DRAW_2D_HEADER_DATA_COUNT(x) (((x) << VIV_FE_DRAW_2D_HEADER_DATA_COUNT__SHIFT) & VIV_FE_DRAW_2D_HEADER_DATA_COUNT__MASK) +#define VIV_FE_DRAW_2D_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_DRAW_2D_HEADER_OP__SHIFT 27 +#define VIV_FE_DRAW_2D_HEADER_OP_DRAW_2D 0x20000000 + +#define VIV_FE_DRAW_2D_TOP_LEFT 0x00000008 +#define VIV_FE_DRAW_2D_TOP_LEFT_X__MASK 0x0000ffff +#define VIV_FE_DRAW_2D_TOP_LEFT_X__SHIFT 0 +#define VIV_FE_DRAW_2D_TOP_LEFT_X(x) (((x) << VIV_FE_DRAW_2D_TOP_LEFT_X__SHIFT) & VIV_FE_DRAW_2D_TOP_LEFT_X__MASK) +#define VIV_FE_DRAW_2D_TOP_LEFT_Y__MASK 0xffff0000 +#define VIV_FE_DRAW_2D_TOP_LEFT_Y__SHIFT 16 +#define VIV_FE_DRAW_2D_TOP_LEFT_Y(x) (((x) << VIV_FE_DRAW_2D_TOP_LEFT_Y__SHIFT) & VIV_FE_DRAW_2D_TOP_LEFT_Y__MASK) + +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT 0x0000000c +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__MASK 0x0000ffff +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__SHIFT 0 +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X(x) (((x) << VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__SHIFT) & VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__MASK) +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__MASK 0xffff0000 +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__SHIFT 16 +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y(x) (((x) << VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__SHIFT) & VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__MASK) + +#define VIV_FE_DRAW_PRIMITIVES 0x00000000 + +#define VIV_FE_DRAW_PRIMITIVES_HEADER 0x00000000 +#define VIV_FE_DRAW_PRIMITIVES_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_DRAW_PRIMITIVES_HEADER_OP__SHIFT 27 +#define VIV_FE_DRAW_PRIMITIVES_HEADER_OP_DRAW_PRIMITIVES 0x28000000 + +#define VIV_FE_DRAW_PRIMITIVES_COMMAND 0x00000004 +#define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__MASK 0x000000ff +#define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__SHIFT 0 +#define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE(x) (((x) << VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__SHIFT) & VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__MASK) + +#define VIV_FE_DRAW_PRIMITIVES_START 0x00000008 + +#define VIV_FE_DRAW_PRIMITIVES_COUNT 0x0000000c + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES 0x00000000 + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER 0x00000000 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP__SHIFT 27 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP_DRAW_INDEXED_PRIMITIVES 0x30000000 + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND 0x00000004 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__MASK 0x000000ff +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__SHIFT 0 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE(x) (((x) << VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__SHIFT) & VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__MASK) + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_START 0x00000008 + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COUNT 0x0000000c + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_OFFSET 0x00000010 + +#define VIV_FE_WAIT 0x00000000 + +#define VIV_FE_WAIT_HEADER 0x00000000 +#define VIV_FE_WAIT_HEADER_DELAY__MASK 0x0000ffff +#define VIV_FE_WAIT_HEADER_DELAY__SHIFT 0 +#define VIV_FE_WAIT_HEADER_DELAY(x) (((x) << VIV_FE_WAIT_HEADER_DELAY__SHIFT) & VIV_FE_WAIT_HEADER_DELAY__MASK) +#define VIV_FE_WAIT_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_WAIT_HEADER_OP__SHIFT 27 +#define VIV_FE_WAIT_HEADER_OP_WAIT 0x38000000 + +#define VIV_FE_LINK 0x00000000 + +#define VIV_FE_LINK_HEADER 0x00000000 +#define VIV_FE_LINK_HEADER_PREFETCH__MASK 0x0000ffff +#define VIV_FE_LINK_HEADER_PREFETCH__SHIFT 0 +#define VIV_FE_LINK_HEADER_PREFETCH(x) (((x) << VIV_FE_LINK_HEADER_PREFETCH__SHIFT) & VIV_FE_LINK_HEADER_PREFETCH__MASK) +#define VIV_FE_LINK_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_LINK_HEADER_OP__SHIFT 27 +#define VIV_FE_LINK_HEADER_OP_LINK 0x40000000 + +#define VIV_FE_LINK_ADDRESS 0x00000004 + +#define VIV_FE_STALL 0x00000000 + +#define VIV_FE_STALL_HEADER 0x00000000 +#define VIV_FE_STALL_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_STALL_HEADER_OP__SHIFT 27 +#define VIV_FE_STALL_HEADER_OP_STALL 0x48000000 + +#define VIV_FE_STALL_TOKEN 0x00000004 +#define VIV_FE_STALL_TOKEN_FROM__MASK 0x0000001f +#define VIV_FE_STALL_TOKEN_FROM__SHIFT 0 +#define VIV_FE_STALL_TOKEN_FROM(x) (((x) << VIV_FE_STALL_TOKEN_FROM__SHIFT) & VIV_FE_STALL_TOKEN_FROM__MASK) +#define VIV_FE_STALL_TOKEN_TO__MASK 0x00001f00 +#define VIV_FE_STALL_TOKEN_TO__SHIFT 8 +#define VIV_FE_STALL_TOKEN_TO(x) (((x) << VIV_FE_STALL_TOKEN_TO__SHIFT) & VIV_FE_STALL_TOKEN_TO__MASK) + +#define VIV_FE_CALL 0x00000000 + +#define VIV_FE_CALL_HEADER 0x00000000 +#define VIV_FE_CALL_HEADER_PREFETCH__MASK 0x0000ffff +#define VIV_FE_CALL_HEADER_PREFETCH__SHIFT 0 +#define VIV_FE_CALL_HEADER_PREFETCH(x) (((x) << VIV_FE_CALL_HEADER_PREFETCH__SHIFT) & VIV_FE_CALL_HEADER_PREFETCH__MASK) +#define VIV_FE_CALL_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_CALL_HEADER_OP__SHIFT 27 +#define VIV_FE_CALL_HEADER_OP_CALL 0x50000000 + +#define VIV_FE_CALL_ADDRESS 0x00000004 + +#define VIV_FE_CALL_RETURN_PREFETCH 0x00000008 + +#define VIV_FE_CALL_RETURN_ADDRESS 0x0000000c + +#define VIV_FE_RETURN 0x00000000 + +#define VIV_FE_RETURN_HEADER 0x00000000 +#define VIV_FE_RETURN_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_RETURN_HEADER_OP__SHIFT 27 +#define VIV_FE_RETURN_HEADER_OP_RETURN 0x58000000 + +#define VIV_FE_CHIP_SELECT 0x00000000 + +#define VIV_FE_CHIP_SELECT_HEADER 0x00000000 +#define VIV_FE_CHIP_SELECT_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_CHIP_SELECT_HEADER_OP__SHIFT 27 +#define VIV_FE_CHIP_SELECT_HEADER_OP_CHIP_SELECT 0x68000000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP15 0x00008000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP14 0x00004000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP13 0x00002000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP12 0x00001000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP11 0x00000800 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP10 0x00000400 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP9 0x00000200 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP8 0x00000100 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP7 0x00000080 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP6 0x00000040 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP5 0x00000020 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP4 0x00000010 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP3 0x00000008 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP2 0x00000004 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP1 0x00000002 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP0 0x00000001 + + +#endif /* CMDSTREAM_XML */ diff --git a/tests/etnaviv/etnaviv_2d_test.c b/tests/etnaviv/etnaviv_2d_test.c new file mode 100644 index 0000000..10751c7 --- /dev/null +++ b/tests/etnaviv/etnaviv_2d_test.c @@ -0,0 +1,240 @@ +/* + * Copyright (C) 2014-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifdef HAVE_CONFIG_H +# include "config.h" +#endif + +#include <fcntl.h> +#include <stdio.h> +#include <string.h> +#include <unistd.h> + +#include "xf86drm.h" +#include "etnaviv_drmif.h" +#include "etnaviv_drm.h" + +#include "state.xml.h" +#include "state_2d.xml.h" +#include "cmdstream.xml.h" + +#include "write_bmp.h" + +static inline void etna_emit_load_state(struct etna_cmd_stream *stream, + const uint16_t offset, const uint16_t count) +{ + uint32_t v; + + v = (VIV_FE_LOAD_STATE_HEADER_OP_LOAD_STATE | VIV_FE_LOAD_STATE_HEADER_OFFSET(offset) | + (VIV_FE_LOAD_STATE_HEADER_COUNT(count) & VIV_FE_LOAD_STATE_HEADER_COUNT__MASK)); + + etna_cmd_stream_emit(stream, v); +} + +static inline void etna_set_state(struct etna_cmd_stream *stream, uint32_t address, uint32_t value) +{ + etna_cmd_stream_reserve(stream, 2); + etna_emit_load_state(stream, address >> 2, 1); + etna_cmd_stream_emit(stream, value); +} + +static inline void etna_set_state_from_bo(struct etna_cmd_stream *stream, + uint32_t address, struct etna_bo *bo) +{ + etna_cmd_stream_reserve(stream, 2); + etna_emit_load_state(stream, address >> 2, 1); + + etna_cmd_stream_reloc(stream, &(struct etna_reloc){ + .bo = bo, + .flags = ETNA_RELOC_READ, + .offset = 0, + }); +} + +static void gen_cmd_stream(struct etna_cmd_stream *stream, struct etna_bo *bmp, const int width, const int height) +{ + int rec; + static int num_rects = 256; + + etna_set_state(stream, VIVS_DE_SRC_STRIDE, 0); + etna_set_state(stream, VIVS_DE_SRC_ROTATION_CONFIG, 0); + etna_set_state(stream, VIVS_DE_SRC_CONFIG, 0); + etna_set_state(stream, VIVS_DE_SRC_ORIGIN, 0); + etna_set_state(stream, VIVS_DE_SRC_SIZE, 0); + etna_set_state(stream, VIVS_DE_SRC_COLOR_BG, 0); + etna_set_state(stream, VIVS_DE_SRC_COLOR_FG, 0); + etna_set_state(stream, VIVS_DE_STRETCH_FACTOR_LOW, 0); + etna_set_state(stream, VIVS_DE_STRETCH_FACTOR_HIGH, 0); + etna_set_state_from_bo(stream, VIVS_DE_DEST_ADDRESS, bmp); + etna_set_state(stream, VIVS_DE_DEST_STRIDE, width*4); + etna_set_state(stream, VIVS_DE_DEST_ROTATION_CONFIG, 0); + etna_set_state(stream, VIVS_DE_DEST_CONFIG, + VIVS_DE_DEST_CONFIG_FORMAT(DE_FORMAT_A8R8G8B8) | + VIVS_DE_DEST_CONFIG_COMMAND_CLEAR | + VIVS_DE_DEST_CONFIG_SWIZZLE(DE_SWIZZLE_ARGB) | + VIVS_DE_DEST_CONFIG_TILED_DISABLE | + VIVS_DE_DEST_CONFIG_MINOR_TILED_DISABLE + ); + etna_set_state(stream, VIVS_DE_ROP, + VIVS_DE_ROP_ROP_FG(0xcc) | VIVS_DE_ROP_ROP_BG(0xcc) | VIVS_DE_ROP_TYPE_ROP4); + etna_set_state(stream, VIVS_DE_CLIP_TOP_LEFT, + VIVS_DE_CLIP_TOP_LEFT_X(0) | + VIVS_DE_CLIP_TOP_LEFT_Y(0) + ); + etna_set_state(stream, VIVS_DE_CLIP_BOTTOM_RIGHT, + VIVS_DE_CLIP_BOTTOM_RIGHT_X(width) | + VIVS_DE_CLIP_BOTTOM_RIGHT_Y(height) + ); + etna_set_state(stream, VIVS_DE_CONFIG, 0); /* TODO */ + etna_set_state(stream, VIVS_DE_SRC_ORIGIN_FRACTION, 0); + etna_set_state(stream, VIVS_DE_ALPHA_CONTROL, 0); + etna_set_state(stream, VIVS_DE_ALPHA_MODES, 0); + etna_set_state(stream, VIVS_DE_DEST_ROTATION_HEIGHT, 0); + etna_set_state(stream, VIVS_DE_SRC_ROTATION_HEIGHT, 0); + etna_set_state(stream, VIVS_DE_ROT_ANGLE, 0); + + /* Clear color PE20 */ + etna_set_state(stream, VIVS_DE_CLEAR_PIXEL_VALUE32, 0xff40ff40); + /* Clear color PE10 */ + etna_set_state(stream, VIVS_DE_CLEAR_BYTE_MASK, 0xff); + etna_set_state(stream, VIVS_DE_CLEAR_PIXEL_VALUE_LOW, 0xff40ff40); + etna_set_state(stream, VIVS_DE_CLEAR_PIXEL_VALUE_HIGH, 0xff40ff40); + + etna_set_state(stream, VIVS_DE_DEST_COLOR_KEY, 0); + etna_set_state(stream, VIVS_DE_GLOBAL_SRC_COLOR, 0); + etna_set_state(stream, VIVS_DE_GLOBAL_DEST_COLOR, 0); + etna_set_state(stream, VIVS_DE_COLOR_MULTIPLY_MODES, 0); + etna_set_state(stream, VIVS_DE_PE_TRANSPARENCY, 0); + etna_set_state(stream, VIVS_DE_PE_CONTROL, 0); + etna_set_state(stream, VIVS_DE_PE_DITHER_LOW, 0xffffffff); + etna_set_state(stream, VIVS_DE_PE_DITHER_HIGH, 0xffffffff); + + /* Queue DE command */ + etna_cmd_stream_emit(stream, + VIV_FE_DRAW_2D_HEADER_OP_DRAW_2D | VIV_FE_DRAW_2D_HEADER_COUNT(num_rects) /* render one rectangle */ + ); + etna_cmd_stream_emit(stream, 0x0); /* rectangles start aligned */ + + for(rec=0; rec < num_rects; ++rec) { + int x = rec%16; + int y = rec/16; + etna_cmd_stream_emit(stream, VIV_FE_DRAW_2D_TOP_LEFT_X(x*8) | VIV_FE_DRAW_2D_TOP_LEFT_Y(y*8)); + etna_cmd_stream_emit(stream, VIV_FE_DRAW_2D_BOTTOM_RIGHT_X(x*8+4) | VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y(y*8+4)); + } + etna_set_state(stream, 1, 0); + etna_set_state(stream, 1, 0); + etna_set_state(stream, 1, 0); + + etna_set_state(stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_PE2D); +} + +int main(int argc, char *argv[]) +{ + const int width = 256; + const int height = 256; + const size_t bmp_size = width * height * 4; + + struct etna_device *dev; + struct etna_gpu *gpu; + struct etna_pipe *pipe; + struct etna_bo *bmp; + struct etna_cmd_stream *stream; + + drmVersionPtr version; + int fd, ret = 0; + + fd = open(argv[1], O_RDWR); + if (fd < 0) + return 1; + + version = drmGetVersion(fd); + if (version) { + printf("Version: %d.%d.%d\n", version->version_major, + version->version_minor, version->version_patchlevel); + printf(" Name: %s\n", version->name); + printf(" Date: %s\n", version->date); + printf(" Description: %s\n", version->desc); + drmFreeVersion(version); + } + + dev = etna_device_new(fd); + if (!dev) { + ret = 2; + goto out; + } + + /* TODO: we assume that core 0 is a 2D capable one */ + gpu = etna_gpu_new(dev, 0); + if (!gpu) { + ret = 3; + goto out_device; + } + + pipe = etna_pipe_new(gpu, ETNA_PIPE_2D); + if (!pipe) { + ret = 4; + goto out_gpu; + } + + bmp = etna_bo_new(dev, bmp_size, ETNA_BO_UNCACHED); + if (!bmp) { + ret = 5; + goto out_pipe; + } + memset(etna_bo_map(bmp), 0, bmp_size); + + stream = etna_cmd_stream_new(pipe, 0x300, NULL, NULL); + if (!stream) { + ret = 6; + goto out_bo; + } + + /* generate command sequence */ + gen_cmd_stream(stream, bmp, width, height); + + etna_cmd_stream_finish(stream); + + bmp_dump32(etna_bo_map(bmp), width, height, false, "/tmp/etna.bmp"); + + etna_cmd_stream_del(stream); + +out_bo: + etna_bo_del(bmp); + +out_pipe: + etna_pipe_del(pipe); + +out_gpu: + etna_gpu_del(gpu); + +out_device: + etna_device_del(dev); + +out: + close(fd); + + return ret; +} diff --git a/tests/etnaviv/etnaviv_bo_cache_test.c b/tests/etnaviv/etnaviv_bo_cache_test.c new file mode 100644 index 0000000..fb01f8d --- /dev/null +++ b/tests/etnaviv/etnaviv_bo_cache_test.c @@ -0,0 +1,121 @@ +/* + * Copyright (C) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifdef HAVE_CONFIG_H +# include "config.h" +#endif + +#undef NDEBUG +#include <assert.h> + +#include <fcntl.h> +#include <stdio.h> +#include <string.h> +#include <unistd.h> + +#include "xf86drm.h" +#include "etnaviv_drmif.h" +#include "etnaviv_drm.h" + +static void test_cache(struct etna_device *dev) +{ + struct etna_bo *bo, *tmp; + + /* allocate and free some bo's with same size - we must + * get the same bo over and over. */ + printf("testing bo cache ... "); + + bo = tmp = etna_bo_new(dev, 0x100, ETNA_BO_UNCACHED); + assert(bo); + etna_bo_del(bo); + + for (unsigned i = 0; i < 100; i++) { + tmp = etna_bo_new(dev, 0x100, ETNA_BO_UNCACHED); + etna_bo_del(tmp); + assert(tmp == bo); + } + + printf("ok\n"); +} + +static void test_size_rounding(struct etna_device *dev) +{ + struct etna_bo *bo; + + printf("testing size rounding ... "); + + bo = etna_bo_new(dev, 15, ETNA_BO_UNCACHED); + assert(etna_bo_size(bo) == 4096); + etna_bo_del(bo); + + bo = etna_bo_new(dev, 4096, ETNA_BO_UNCACHED); + assert(etna_bo_size(bo) == 4096); + etna_bo_del(bo); + + bo = etna_bo_new(dev, 4100, ETNA_BO_UNCACHED); + assert(etna_bo_size(bo) == 8192); + etna_bo_del(bo); + + printf("ok\n"); +} + +int main(int argc, char *argv[]) +{ + struct etna_device *dev; + + drmVersionPtr version; + int fd, ret = 0; + + fd = open(argv[1], O_RDWR); + if (fd < 0) + return 1; + + version = drmGetVersion(fd); + if (version) { + printf("Version: %d.%d.%d\n", version->version_major, + version->version_minor, version->version_patchlevel); + printf(" Name: %s\n", version->name); + printf(" Date: %s\n", version->date); + printf(" Description: %s\n", version->desc); + drmFreeVersion(version); + } + + dev = etna_device_new(fd); + if (!dev) { + ret = 2; + goto out; + } + + test_cache(dev); + test_size_rounding(dev); + + etna_device_del(dev); + +out: + close(fd); + + return ret; +} diff --git a/tests/etnaviv/etnaviv_cmd_stream_test.c b/tests/etnaviv/etnaviv_cmd_stream_test.c new file mode 100644 index 0000000..b650aae --- /dev/null +++ b/tests/etnaviv/etnaviv_cmd_stream_test.c @@ -0,0 +1,123 @@ +/* + * Copyright (C) 2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#undef NDEBUG +#include <assert.h> +#include <string.h> +#include <stdio.h> + +#include "etnaviv_drmif.h" + +static void test_avail() +{ + struct etna_cmd_stream *stream; + + printf("testing etna_cmd_stream_avail ... "); + + /* invalid size */ + stream = etna_cmd_stream_new(NULL, 0, NULL, NULL); + assert(stream == NULL); + + stream = etna_cmd_stream_new(NULL, 4, NULL, NULL); + assert(stream); + assert(etna_cmd_stream_avail(stream) == 2); + etna_cmd_stream_del(stream); + + stream = etna_cmd_stream_new(NULL, 20, NULL, NULL); + assert(stream); + assert(etna_cmd_stream_avail(stream) == 18); + etna_cmd_stream_del(stream); + + /* odd number of 32 bit words */ + stream = etna_cmd_stream_new(NULL, 1, NULL, NULL); + assert(stream); + assert(etna_cmd_stream_avail(stream) == 0); + etna_cmd_stream_del(stream); + + stream = etna_cmd_stream_new(NULL, 23, NULL, NULL); + assert(stream); + assert(etna_cmd_stream_avail(stream) == 22); + etna_cmd_stream_del(stream); + + printf("ok\n"); +} + +static void test_emit() +{ + struct etna_cmd_stream *stream; + + printf("testing etna_cmd_stream_emit ... "); + + stream = etna_cmd_stream_new(NULL, 6, NULL, NULL); + assert(stream); + assert(etna_cmd_stream_avail(stream) == 4); + + etna_cmd_stream_emit(stream, 0x1); + assert(etna_cmd_stream_avail(stream) == 3); + + etna_cmd_stream_emit(stream, 0x2); + assert(etna_cmd_stream_avail(stream) == 2); + + etna_cmd_stream_emit(stream, 0x3); + assert(etna_cmd_stream_avail(stream) == 1); + + etna_cmd_stream_del(stream); + + printf("ok\n"); +} + +static void test_offset() +{ + struct etna_cmd_stream *stream; + + printf("testing etna_cmd_stream_offset ... "); + + stream = etna_cmd_stream_new(NULL, 6, NULL, NULL); + assert(etna_cmd_stream_offset(stream) == 0); + + etna_cmd_stream_emit(stream, 0x1); + assert(etna_cmd_stream_offset(stream) == 1); + + etna_cmd_stream_emit(stream, 0x2); + assert(etna_cmd_stream_offset(stream) == 2); + + etna_cmd_stream_emit(stream, 0x3); + etna_cmd_stream_emit(stream, 0x4); + assert(etna_cmd_stream_offset(stream) == 4); + + etna_cmd_stream_del(stream); + + printf("ok\n"); +} + +int main(int argc, char *argv[]) +{ + test_avail(); + test_emit(); + test_offset(); + + return 0; +} diff --git a/tests/etnaviv/state.xml.h b/tests/etnaviv/state.xml.h new file mode 100644 index 0000000..e1ecbf3 --- /dev/null +++ b/tests/etnaviv/state.xml.h @@ -0,0 +1,375 @@ +#ifndef STATE_XML +#define STATE_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +http://0x04.net/cgit/index.cgi/rules-ng-ng +git clone git://0x04.net/rules-ng-ng + +The rules-ng-ng source files this header was generated from are: +- state.xml ( 18940 bytes, from 2016-09-06 14:14:12) +- common.xml ( 20583 bytes, from 2016-09-06 14:14:12) +- state_hi.xml ( 25653 bytes, from 2016-09-06 14:45:17) +- copyright.xml ( 1597 bytes, from 2016-09-06 14:44:16) +- state_2d.xml ( 51552 bytes, from 2016-09-06 14:44:16) +- state_3d.xml ( 54603 bytes, from 2016-09-06 14:44:16) +- state_vg.xml ( 5975 bytes, from 2016-09-06 14:44:16) + +Copyright (C) 2012-2016 by the following authors: +- Wladimir J. van der Laan <[email protected]> +- Christian Gmeiner <[email protected]> +- Lucas Stach <[email protected]> +- Russell King <[email protected]> + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sub license, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. +*/ + + +#define VARYING_COMPONENT_USE_UNUSED 0x00000000 +#define VARYING_COMPONENT_USE_USED 0x00000001 +#define VARYING_COMPONENT_USE_POINTCOORD_X 0x00000002 +#define VARYING_COMPONENT_USE_POINTCOORD_Y 0x00000003 +#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__MASK 0x000000ff +#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__SHIFT 0 +#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE(x) (((x) << FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__SHIFT) & FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__MASK) +#define VIVS_FE 0x00000000 + +#define VIVS_FE_VERTEX_ELEMENT_CONFIG(i0) (0x00000600 + 0x4*(i0)) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG__ESIZE 0x00000004 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG__LEN 0x00000010 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__MASK 0x0000000f +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__SHIFT 0 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_BYTE 0x00000000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_BYTE 0x00000001 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_SHORT 0x00000002 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_SHORT 0x00000003 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_INT 0x00000004 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_INT 0x00000005 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_FLOAT 0x00000008 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_HALF_FLOAT 0x00000009 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_FIXED 0x0000000b +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_INT_10_10_10_2 0x0000000c +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_INT_10_10_10_2 0x0000000d +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__MASK 0x00000030 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__SHIFT 4 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__MASK) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NONCONSECUTIVE 0x00000080 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__MASK 0x00000700 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__SHIFT 8 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__MASK) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__MASK 0x00003000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__SHIFT 12 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__MASK) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE__MASK 0x0000c000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE__SHIFT 14 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF 0x00000000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_ON 0x00008000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_START__MASK 0x00ff0000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_START__SHIFT 16 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_START(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_START__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_START__MASK) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_END__MASK 0xff000000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_END__SHIFT 24 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_END(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_END__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_END__MASK) + +#define VIVS_FE_CMD_STREAM_BASE_ADDR 0x00000640 + +#define VIVS_FE_INDEX_STREAM_BASE_ADDR 0x00000644 + +#define VIVS_FE_INDEX_STREAM_CONTROL 0x00000648 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE__MASK 0x00000003 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE__SHIFT 0 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_CHAR 0x00000000 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_SHORT 0x00000001 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_INT 0x00000002 + +#define VIVS_FE_VERTEX_STREAM_BASE_ADDR 0x0000064c + +#define VIVS_FE_VERTEX_STREAM_CONTROL 0x00000650 + +#define VIVS_FE_COMMAND_ADDRESS 0x00000654 + +#define VIVS_FE_COMMAND_CONTROL 0x00000658 +#define VIVS_FE_COMMAND_CONTROL_PREFETCH__MASK 0x0000ffff +#define VIVS_FE_COMMAND_CONTROL_PREFETCH__SHIFT 0 +#define VIVS_FE_COMMAND_CONTROL_PREFETCH(x) (((x) << VIVS_FE_COMMAND_CONTROL_PREFETCH__SHIFT) & VIVS_FE_COMMAND_CONTROL_PREFETCH__MASK) +#define VIVS_FE_COMMAND_CONTROL_ENABLE 0x00010000 + +#define VIVS_FE_DMA_STATUS 0x0000065c + +#define VIVS_FE_DMA_DEBUG_STATE 0x00000660 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE__MASK 0x0000001f +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE__SHIFT 0 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_DEC 0x00000001 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_ADR0 0x00000002 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_LOAD0 0x00000003 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_ADR1 0x00000004 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_LOAD1 0x00000005 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DADR 0x00000006 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DCMD 0x00000007 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DCNTL 0x00000008 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DIDXCNTL 0x00000009 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_INITREQDMA 0x0000000a +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_DRAWIDX 0x0000000b +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_DRAW 0x0000000c +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DRECT0 0x0000000d +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DRECT1 0x0000000e +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DDATA0 0x0000000f +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DDATA1 0x00000010 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_WAITFIFO 0x00000011 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_WAIT 0x00000012 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_LINK 0x00000013 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_END 0x00000014 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_STALL 0x00000015 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE__MASK 0x00000300 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE__SHIFT 8 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_START 0x00000100 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_REQ 0x00000200 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_END 0x00000300 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE__MASK 0x00000c00 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE__SHIFT 10 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE_RAMVALID 0x00000400 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE_VALID 0x00000800 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE__MASK 0x00003000 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE__SHIFT 12 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE_WAITIDX 0x00001000 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE_CAL 0x00002000 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE__MASK 0x0000c000 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE__SHIFT 14 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE_LDADR 0x00004000 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE_IDXCALC 0x00008000 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE__MASK 0x00030000 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE__SHIFT 16 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE_CKCACHE 0x00010000 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE_MISS 0x00020000 + +#define VIVS_FE_DMA_ADDRESS 0x00000664 + +#define VIVS_FE_DMA_LOW 0x00000668 + +#define VIVS_FE_DMA_HIGH 0x0000066c + +#define VIVS_FE_AUTO_FLUSH 0x00000670 + +#define VIVS_FE_UNK00678 0x00000678 + +#define VIVS_FE_UNK0067C 0x0000067c + +#define VIVS_FE_VERTEX_STREAMS(i0) (0x00000000 + 0x4*(i0)) +#define VIVS_FE_VERTEX_STREAMS__ESIZE 0x00000004 +#define VIVS_FE_VERTEX_STREAMS__LEN 0x00000008 + +#define VIVS_FE_VERTEX_STREAMS_BASE_ADDR(i0) (0x00000680 + 0x4*(i0)) + +#define VIVS_FE_VERTEX_STREAMS_CONTROL(i0) (0x000006a0 + 0x4*(i0)) + +#define VIVS_FE_UNK00700(i0) (0x00000700 + 0x4*(i0)) +#define VIVS_FE_UNK00700__ESIZE 0x00000004 +#define VIVS_FE_UNK00700__LEN 0x00000010 + +#define VIVS_FE_UNK00740(i0) (0x00000740 + 0x4*(i0)) +#define VIVS_FE_UNK00740__ESIZE 0x00000004 +#define VIVS_FE_UNK00740__LEN 0x00000010 + +#define VIVS_FE_UNK00780(i0) (0x00000780 + 0x4*(i0)) +#define VIVS_FE_UNK00780__ESIZE 0x00000004 +#define VIVS_FE_UNK00780__LEN 0x00000010 + +#define VIVS_GL 0x00000000 + +#define VIVS_GL_PIPE_SELECT 0x00003800 +#define VIVS_GL_PIPE_SELECT_PIPE__MASK 0x00000001 +#define VIVS_GL_PIPE_SELECT_PIPE__SHIFT 0 +#define VIVS_GL_PIPE_SELECT_PIPE(x) (((x) << VIVS_GL_PIPE_SELECT_PIPE__SHIFT) & VIVS_GL_PIPE_SELECT_PIPE__MASK) + +#define VIVS_GL_EVENT 0x00003804 +#define VIVS_GL_EVENT_EVENT_ID__MASK 0x0000001f +#define VIVS_GL_EVENT_EVENT_ID__SHIFT 0 +#define VIVS_GL_EVENT_EVENT_ID(x) (((x) << VIVS_GL_EVENT_EVENT_ID__SHIFT) & VIVS_GL_EVENT_EVENT_ID__MASK) +#define VIVS_GL_EVENT_FROM_FE 0x00000020 +#define VIVS_GL_EVENT_FROM_PE 0x00000040 +#define VIVS_GL_EVENT_SOURCE__MASK 0x00001f00 +#define VIVS_GL_EVENT_SOURCE__SHIFT 8 +#define VIVS_GL_EVENT_SOURCE(x) (((x) << VIVS_GL_EVENT_SOURCE__SHIFT) & VIVS_GL_EVENT_SOURCE__MASK) + +#define VIVS_GL_SEMAPHORE_TOKEN 0x00003808 +#define VIVS_GL_SEMAPHORE_TOKEN_FROM__MASK 0x0000001f +#define VIVS_GL_SEMAPHORE_TOKEN_FROM__SHIFT 0 +#define VIVS_GL_SEMAPHORE_TOKEN_FROM(x) (((x) << VIVS_GL_SEMAPHORE_TOKEN_FROM__SHIFT) & VIVS_GL_SEMAPHORE_TOKEN_FROM__MASK) +#define VIVS_GL_SEMAPHORE_TOKEN_TO__MASK 0x00001f00 +#define VIVS_GL_SEMAPHORE_TOKEN_TO__SHIFT 8 +#define VIVS_GL_SEMAPHORE_TOKEN_TO(x) (((x) << VIVS_GL_SEMAPHORE_TOKEN_TO__SHIFT) & VIVS_GL_SEMAPHORE_TOKEN_TO__MASK) + +#define VIVS_GL_FLUSH_CACHE 0x0000380c +#define VIVS_GL_FLUSH_CACHE_DEPTH 0x00000001 +#define VIVS_GL_FLUSH_CACHE_COLOR 0x00000002 +#define VIVS_GL_FLUSH_CACHE_TEXTURE 0x00000004 +#define VIVS_GL_FLUSH_CACHE_PE2D 0x00000008 +#define VIVS_GL_FLUSH_CACHE_TEXTUREVS 0x00000010 +#define VIVS_GL_FLUSH_CACHE_SHADER_L1 0x00000020 +#define VIVS_GL_FLUSH_CACHE_SHADER_L2 0x00000040 + +#define VIVS_GL_FLUSH_MMU 0x00003810 +#define VIVS_GL_FLUSH_MMU_FLUSH_FEMMU 0x00000001 +#define VIVS_GL_FLUSH_MMU_FLUSH_UNK1 0x00000002 +#define VIVS_GL_FLUSH_MMU_FLUSH_UNK2 0x00000004 +#define VIVS_GL_FLUSH_MMU_FLUSH_PEMMU 0x00000008 +#define VIVS_GL_FLUSH_MMU_FLUSH_UNK4 0x00000010 + +#define VIVS_GL_VERTEX_ELEMENT_CONFIG 0x00003814 + +#define VIVS_GL_MULTI_SAMPLE_CONFIG 0x00003818 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES__MASK 0x00000003 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES__SHIFT 0 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_NONE 0x00000000 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_2X 0x00000001 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_4X 0x00000002 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_MASK 0x00000008 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__MASK 0x000000f0 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__SHIFT 4 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__MASK) +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES_MASK 0x00000100 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__MASK 0x00007000 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__SHIFT 12 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__MASK) +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12_MASK 0x00008000 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__MASK 0x00030000 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__SHIFT 16 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__MASK) +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16_MASK 0x00080000 + +#define VIVS_GL_VARYING_TOTAL_COMPONENTS 0x0000381c +#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__MASK 0x000000ff +#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__SHIFT 0 +#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM(x) (((x) << VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__SHIFT) & VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__MASK) + +#define VIVS_GL_VARYING_NUM_COMPONENTS 0x00003820 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__MASK 0x00000007 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__SHIFT 0 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__MASK 0x00000070 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__SHIFT 4 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__MASK 0x00000700 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__SHIFT 8 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__MASK 0x00007000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__SHIFT 12 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__MASK 0x00070000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__SHIFT 16 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__MASK 0x00700000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__SHIFT 20 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__MASK 0x07000000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__SHIFT 24 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__MASK 0x70000000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__SHIFT 28 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__MASK) + +#define VIVS_GL_VARYING_COMPONENT_USE(i0) (0x00003828 + 0x4*(i0)) +#define VIVS_GL_VARYING_COMPONENT_USE__ESIZE 0x00000004 +#define VIVS_GL_VARYING_COMPONENT_USE__LEN 0x00000002 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP0__MASK 0x00000003 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP0__SHIFT 0 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP0(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP0__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP0__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP1__MASK 0x0000000c +#define VIVS_GL_VARYING_COMPONENT_USE_COMP1__SHIFT 2 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP1(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP1__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP1__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP2__MASK 0x00000030 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP2__SHIFT 4 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP2(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP2__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP2__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP3__MASK 0x000000c0 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP3__SHIFT 6 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP3(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP3__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP3__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP4__MASK 0x00000300 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP4__SHIFT 8 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP4(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP4__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP4__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP5__MASK 0x00000c00 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP5__SHIFT 10 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP5(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP5__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP5__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP6__MASK 0x00003000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP6__SHIFT 12 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP6(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP6__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP6__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP7__MASK 0x0000c000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP7__SHIFT 14 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP7(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP7__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP7__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP8__MASK 0x00030000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP8__SHIFT 16 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP8(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP8__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP8__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP9__MASK 0x000c0000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP9__SHIFT 18 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP9(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP9__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP9__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP10__MASK 0x00300000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP10__SHIFT 20 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP10(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP10__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP10__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP11__MASK 0x00c00000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP11__SHIFT 22 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP11(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP11__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP11__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP12__MASK 0x03000000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP12__SHIFT 24 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP12(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP12__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP12__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP13__MASK 0x0c000000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP13__SHIFT 26 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP13(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP13__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP13__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP14__MASK 0x30000000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP14__SHIFT 28 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP14(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP14__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP14__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP15__MASK 0xc0000000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP15__SHIFT 30 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP15(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP15__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP15__MASK) + +#define VIVS_GL_UNK03834 0x00003834 + +#define VIVS_GL_UNK03838 0x00003838 + +#define VIVS_GL_API_MODE 0x0000384c +#define VIVS_GL_API_MODE_OPENGL 0x00000000 +#define VIVS_GL_API_MODE_OPENVG 0x00000001 +#define VIVS_GL_API_MODE_OPENCL 0x00000002 + +#define VIVS_GL_CONTEXT_POINTER 0x00003850 + +#define VIVS_GL_UNK03A00 0x00003a00 + +#define VIVS_GL_STALL_TOKEN 0x00003c00 +#define VIVS_GL_STALL_TOKEN_FROM__MASK 0x0000001f +#define VIVS_GL_STALL_TOKEN_FROM__SHIFT 0 +#define VIVS_GL_STALL_TOKEN_FROM(x) (((x) << VIVS_GL_STALL_TOKEN_FROM__SHIFT) & VIVS_GL_STALL_TOKEN_FROM__MASK) +#define VIVS_GL_STALL_TOKEN_TO__MASK 0x00001f00 +#define VIVS_GL_STALL_TOKEN_TO__SHIFT 8 +#define VIVS_GL_STALL_TOKEN_TO(x) (((x) << VIVS_GL_STALL_TOKEN_TO__SHIFT) & VIVS_GL_STALL_TOKEN_TO__MASK) +#define VIVS_GL_STALL_TOKEN_FLIP0 0x40000000 +#define VIVS_GL_STALL_TOKEN_FLIP1 0x80000000 + +#define VIVS_DUMMY 0x00000000 + +#define VIVS_DUMMY_DUMMY 0x0003fffc + + +#endif /* STATE_XML */ diff --git a/tests/etnaviv/state_2d.xml.h b/tests/etnaviv/state_2d.xml.h new file mode 100644 index 0000000..715eed4 --- /dev/null +++ b/tests/etnaviv/state_2d.xml.h @@ -0,0 +1,1497 @@ +#ifndef STATE_2D_XML +#define STATE_2D_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +http://0x04.net/cgit/index.cgi/rules-ng-ng +git clone git://0x04.net/rules-ng-ng + +The rules-ng-ng source files this header was generated from are: +- state.xml ( 18940 bytes, from 2016-09-06 14:14:12) +- common.xml ( 20583 bytes, from 2016-09-06 14:14:12) +- state_hi.xml ( 25653 bytes, from 2016-09-06 14:45:17) +- copyright.xml ( 1597 bytes, from 2016-09-06 14:44:16) +- state_2d.xml ( 51552 bytes, from 2016-09-06 14:44:16) +- state_3d.xml ( 54603 bytes, from 2016-09-06 14:44:16) +- state_vg.xml ( 5975 bytes, from 2016-09-06 14:44:16) + +Copyright (C) 2012-2016 by the following authors: +- Wladimir J. van der Laan <[email protected]> +- Christian Gmeiner <[email protected]> +- Lucas Stach <[email protected]> +- Russell King <[email protected]> + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sub license, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. +*/ + + +#define DE_FORMAT_X4R4G4B4 0x00000000 +#define DE_FORMAT_A4R4G4B4 0x00000001 +#define DE_FORMAT_X1R5G5B5 0x00000002 +#define DE_FORMAT_A1R5G5B5 0x00000003 +#define DE_FORMAT_R5G6B5 0x00000004 +#define DE_FORMAT_X8R8G8B8 0x00000005 +#define DE_FORMAT_A8R8G8B8 0x00000006 +#define DE_FORMAT_YUY2 0x00000007 +#define DE_FORMAT_UYVY 0x00000008 +#define DE_FORMAT_INDEX8 0x00000009 +#define DE_FORMAT_MONOCHROME 0x0000000a +#define DE_FORMAT_YV12 0x0000000f +#define DE_FORMAT_A8 0x00000010 +#define DE_FORMAT_NV12 0x00000011 +#define DE_FORMAT_NV16 0x00000012 +#define DE_FORMAT_RG16 0x00000013 +#define DE_SWIZZLE_ARGB 0x00000000 +#define DE_SWIZZLE_RGBA 0x00000001 +#define DE_SWIZZLE_ABGR 0x00000002 +#define DE_SWIZZLE_BGRA 0x00000003 +#define DE_BLENDMODE_ZERO 0x00000000 +#define DE_BLENDMODE_ONE 0x00000001 +#define DE_BLENDMODE_NORMAL 0x00000002 +#define DE_BLENDMODE_INVERSED 0x00000003 +#define DE_BLENDMODE_COLOR 0x00000004 +#define DE_BLENDMODE_COLOR_INVERSED 0x00000005 +#define DE_BLENDMODE_SATURATED_ALPHA 0x00000006 +#define DE_BLENDMODE_SATURATED_DEST_ALPHA 0x00000007 +#define DE_COMPONENT_BLUE 0x00000000 +#define DE_COMPONENT_GREEN 0x00000001 +#define DE_COMPONENT_RED 0x00000002 +#define DE_COMPONENT_ALPHA 0x00000003 +#define DE_ROT_MODE_ROT0 0x00000000 +#define DE_ROT_MODE_FLIP_X 0x00000001 +#define DE_ROT_MODE_FLIP_Y 0x00000002 +#define DE_ROT_MODE_ROT90 0x00000004 +#define DE_ROT_MODE_ROT180 0x00000005 +#define DE_ROT_MODE_ROT270 0x00000006 +#define DE_MIRROR_MODE_NONE 0x00000000 +#define DE_MIRROR_MODE_MIRROR_X 0x00000001 +#define DE_MIRROR_MODE_MIRROR_Y 0x00000002 +#define DE_MIRROR_MODE_MIRROR_XY 0x00000003 +#define DE_COLOR_BLUE__MASK 0x000000ff +#define DE_COLOR_BLUE__SHIFT 0 +#define DE_COLOR_BLUE(x) (((x) << DE_COLOR_BLUE__SHIFT) & DE_COLOR_BLUE__MASK) +#define DE_COLOR_GREEN__MASK 0x0000ff00 +#define DE_COLOR_GREEN__SHIFT 8 +#define DE_COLOR_GREEN(x) (((x) << DE_COLOR_GREEN__SHIFT) & DE_COLOR_GREEN__MASK) +#define DE_COLOR_RED__MASK 0x00ff0000 +#define DE_COLOR_RED__SHIFT 16 +#define DE_COLOR_RED(x) (((x) << DE_COLOR_RED__SHIFT) & DE_COLOR_RED__MASK) +#define DE_COLOR_ALPHA__MASK 0xff000000 +#define DE_COLOR_ALPHA__SHIFT 24 +#define DE_COLOR_ALPHA(x) (((x) << DE_COLOR_ALPHA__SHIFT) & DE_COLOR_ALPHA__MASK) +#define VIVS_DE 0x00000000 + +#define VIVS_DE_SRC_ADDRESS 0x00001200 + +#define VIVS_DE_SRC_STRIDE 0x00001204 +#define VIVS_DE_SRC_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_DE_SRC_STRIDE_STRIDE__SHIFT 0 +#define VIVS_DE_SRC_STRIDE_STRIDE(x) (((x) << VIVS_DE_SRC_STRIDE_STRIDE__SHIFT) & VIVS_DE_SRC_STRIDE_STRIDE__MASK) + +#define VIVS_DE_SRC_ROTATION_CONFIG 0x00001208 +#define VIVS_DE_SRC_ROTATION_CONFIG_WIDTH__MASK 0x0000ffff +#define VIVS_DE_SRC_ROTATION_CONFIG_WIDTH__SHIFT 0 +#define VIVS_DE_SRC_ROTATION_CONFIG_WIDTH(x) (((x) << VIVS_DE_SRC_ROTATION_CONFIG_WIDTH__SHIFT) & VIVS_DE_SRC_ROTATION_CONFIG_WIDTH__MASK) +#define VIVS_DE_SRC_ROTATION_CONFIG_ROTATION__MASK 0x00010000 +#define VIVS_DE_SRC_ROTATION_CONFIG_ROTATION__SHIFT 16 +#define VIVS_DE_SRC_ROTATION_CONFIG_ROTATION_DISABLE 0x00000000 +#define VIVS_DE_SRC_ROTATION_CONFIG_ROTATION_ENABLE 0x00010000 + +#define VIVS_DE_SRC_CONFIG 0x0000120c +#define VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK 0x0000000f +#define VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT 0 +#define VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT(x) (((x) << VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT) & VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK) +#define VIVS_DE_SRC_CONFIG_TRANSPARENCY__MASK 0x00000030 +#define VIVS_DE_SRC_CONFIG_TRANSPARENCY__SHIFT 4 +#define VIVS_DE_SRC_CONFIG_TRANSPARENCY(x) (((x) << VIVS_DE_SRC_CONFIG_TRANSPARENCY__SHIFT) & VIVS_DE_SRC_CONFIG_TRANSPARENCY__MASK) +#define VIVS_DE_SRC_CONFIG_SRC_RELATIVE__MASK 0x00000040 +#define VIVS_DE_SRC_CONFIG_SRC_RELATIVE__SHIFT 6 +#define VIVS_DE_SRC_CONFIG_SRC_RELATIVE_ABSOLUTE 0x00000000 +#define VIVS_DE_SRC_CONFIG_SRC_RELATIVE_RELATIVE 0x00000040 +#define VIVS_DE_SRC_CONFIG_TILED__MASK 0x00000080 +#define VIVS_DE_SRC_CONFIG_TILED__SHIFT 7 +#define VIVS_DE_SRC_CONFIG_TILED_DISABLE 0x00000000 +#define VIVS_DE_SRC_CONFIG_TILED_ENABLE 0x00000080 +#define VIVS_DE_SRC_CONFIG_LOCATION__MASK 0x00000100 +#define VIVS_DE_SRC_CONFIG_LOCATION__SHIFT 8 +#define VIVS_DE_SRC_CONFIG_LOCATION_MEMORY 0x00000000 +#define VIVS_DE_SRC_CONFIG_LOCATION_STREAM 0x00000100 +#define VIVS_DE_SRC_CONFIG_PACK__MASK 0x00003000 +#define VIVS_DE_SRC_CONFIG_PACK__SHIFT 12 +#define VIVS_DE_SRC_CONFIG_PACK_PACKED8 0x00000000 +#define VIVS_DE_SRC_CONFIG_PACK_PACKED16 0x00001000 +#define VIVS_DE_SRC_CONFIG_PACK_PACKED32 0x00002000 +#define VIVS_DE_SRC_CONFIG_PACK_UNPACKED 0x00003000 +#define VIVS_DE_SRC_CONFIG_MONO_TRANSPARENCY__MASK 0x00008000 +#define VIVS_DE_SRC_CONFIG_MONO_TRANSPARENCY__SHIFT 15 +#define VIVS_DE_SRC_CONFIG_MONO_TRANSPARENCY_BACKGROUND 0x00000000 +#define VIVS_DE_SRC_CONFIG_MONO_TRANSPARENCY_FOREGROUND 0x00008000 +#define VIVS_DE_SRC_CONFIG_UNK16 0x00010000 +#define VIVS_DE_SRC_CONFIG_SWIZZLE__MASK 0x00300000 +#define VIVS_DE_SRC_CONFIG_SWIZZLE__SHIFT 20 +#define VIVS_DE_SRC_CONFIG_SWIZZLE(x) (((x) << VIVS_DE_SRC_CONFIG_SWIZZLE__SHIFT) & VIVS_DE_SRC_CONFIG_SWIZZLE__MASK) +#define VIVS_DE_SRC_CONFIG_SOURCE_FORMAT__MASK 0x1f000000 +#define VIVS_DE_SRC_CONFIG_SOURCE_FORMAT__SHIFT 24 +#define VIVS_DE_SRC_CONFIG_SOURCE_FORMAT(x) (((x) << VIVS_DE_SRC_CONFIG_SOURCE_FORMAT__SHIFT) & VIVS_DE_SRC_CONFIG_SOURCE_FORMAT__MASK) +#define VIVS_DE_SRC_CONFIG_DISABLE420_L2_CACHE 0x20000000 +#define VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL__MASK 0xc0000000 +#define VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL__SHIFT 30 +#define VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL(x) (((x) << VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL__SHIFT) & VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL__MASK) + +#define VIVS_DE_SRC_ORIGIN 0x00001210 +#define VIVS_DE_SRC_ORIGIN_X__MASK 0x0000ffff +#define VIVS_DE_SRC_ORIGIN_X__SHIFT 0 +#define VIVS_DE_SRC_ORIGIN_X(x) (((x) << VIVS_DE_SRC_ORIGIN_X__SHIFT) & VIVS_DE_SRC_ORIGIN_X__MASK) +#define VIVS_DE_SRC_ORIGIN_Y__MASK 0xffff0000 +#define VIVS_DE_SRC_ORIGIN_Y__SHIFT 16 +#define VIVS_DE_SRC_ORIGIN_Y(x) (((x) << VIVS_DE_SRC_ORIGIN_Y__SHIFT) & VIVS_DE_SRC_ORIGIN_Y__MASK) + +#define VIVS_DE_SRC_SIZE 0x00001214 +#define VIVS_DE_SRC_SIZE_X__MASK 0x0000ffff +#define VIVS_DE_SRC_SIZE_X__SHIFT 0 +#define VIVS_DE_SRC_SIZE_X(x) (((x) << VIVS_DE_SRC_SIZE_X__SHIFT) & VIVS_DE_SRC_SIZE_X__MASK) +#define VIVS_DE_SRC_SIZE_Y__MASK 0xffff0000 +#define VIVS_DE_SRC_SIZE_Y__SHIFT 16 +#define VIVS_DE_SRC_SIZE_Y(x) (((x) << VIVS_DE_SRC_SIZE_Y__SHIFT) & VIVS_DE_SRC_SIZE_Y__MASK) + +#define VIVS_DE_SRC_COLOR_BG 0x00001218 + +#define VIVS_DE_SRC_COLOR_FG 0x0000121c + +#define VIVS_DE_STRETCH_FACTOR_LOW 0x00001220 +#define VIVS_DE_STRETCH_FACTOR_LOW_X__MASK 0x7fffffff +#define VIVS_DE_STRETCH_FACTOR_LOW_X__SHIFT 0 +#define VIVS_DE_STRETCH_FACTOR_LOW_X(x) (((x) << VIVS_DE_STRETCH_FACTOR_LOW_X__SHIFT) & VIVS_DE_STRETCH_FACTOR_LOW_X__MASK) + +#define VIVS_DE_STRETCH_FACTOR_HIGH 0x00001224 +#define VIVS_DE_STRETCH_FACTOR_HIGH_Y__MASK 0x7fffffff +#define VIVS_DE_STRETCH_FACTOR_HIGH_Y__SHIFT 0 +#define VIVS_DE_STRETCH_FACTOR_HIGH_Y(x) (((x) << VIVS_DE_STRETCH_FACTOR_HIGH_Y__SHIFT) & VIVS_DE_STRETCH_FACTOR_HIGH_Y__MASK) + +#define VIVS_DE_DEST_ADDRESS 0x00001228 + +#define VIVS_DE_DEST_STRIDE 0x0000122c +#define VIVS_DE_DEST_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_DE_DEST_STRIDE_STRIDE__SHIFT 0 +#define VIVS_DE_DEST_STRIDE_STRIDE(x) (((x) << VIVS_DE_DEST_STRIDE_STRIDE__SHIFT) & VIVS_DE_DEST_STRIDE_STRIDE__MASK) + +#define VIVS_DE_DEST_ROTATION_CONFIG 0x00001230 +#define VIVS_DE_DEST_ROTATION_CONFIG_WIDTH__MASK 0x0000ffff +#define VIVS_DE_DEST_ROTATION_CONFIG_WIDTH__SHIFT 0 +#define VIVS_DE_DEST_ROTATION_CONFIG_WIDTH(x) (((x) << VIVS_DE_DEST_ROTATION_CONFIG_WIDTH__SHIFT) & VIVS_DE_DEST_ROTATION_CONFIG_WIDTH__MASK) +#define VIVS_DE_DEST_ROTATION_CONFIG_ROTATION__MASK 0x00010000 +#define VIVS_DE_DEST_ROTATION_CONFIG_ROTATION__SHIFT 16 +#define VIVS_DE_DEST_ROTATION_CONFIG_ROTATION_DISABLE 0x00000000 +#define VIVS_DE_DEST_ROTATION_CONFIG_ROTATION_ENABLE 0x00010000 + +#define VIVS_DE_DEST_CONFIG 0x00001234 +#define VIVS_DE_DEST_CONFIG_FORMAT__MASK 0x0000001f +#define VIVS_DE_DEST_CONFIG_FORMAT__SHIFT 0 +#define VIVS_DE_DEST_CONFIG_FORMAT(x) (((x) << VIVS_DE_DEST_CONFIG_FORMAT__SHIFT) & VIVS_DE_DEST_CONFIG_FORMAT__MASK) +#define VIVS_DE_DEST_CONFIG_TILED__MASK 0x00000100 +#define VIVS_DE_DEST_CONFIG_TILED__SHIFT 8 +#define VIVS_DE_DEST_CONFIG_TILED_DISABLE 0x00000000 +#define VIVS_DE_DEST_CONFIG_TILED_ENABLE 0x00000100 +#define VIVS_DE_DEST_CONFIG_COMMAND__MASK 0x0000f000 +#define VIVS_DE_DEST_CONFIG_COMMAND__SHIFT 12 +#define VIVS_DE_DEST_CONFIG_COMMAND_CLEAR 0x00000000 +#define VIVS_DE_DEST_CONFIG_COMMAND_LINE 0x00001000 +#define VIVS_DE_DEST_CONFIG_COMMAND_BIT_BLT 0x00002000 +#define VIVS_DE_DEST_CONFIG_COMMAND_BIT_BLT_REVERSED 0x00003000 +#define VIVS_DE_DEST_CONFIG_COMMAND_STRETCH_BLT 0x00004000 +#define VIVS_DE_DEST_CONFIG_COMMAND_HOR_FILTER_BLT 0x00005000 +#define VIVS_DE_DEST_CONFIG_COMMAND_VER_FILTER_BLT 0x00006000 +#define VIVS_DE_DEST_CONFIG_COMMAND_ONE_PASS_FILTER_BLT 0x00007000 +#define VIVS_DE_DEST_CONFIG_COMMAND_MULTI_SOURCE_BLT 0x00008000 +#define VIVS_DE_DEST_CONFIG_SWIZZLE__MASK 0x00030000 +#define VIVS_DE_DEST_CONFIG_SWIZZLE__SHIFT 16 +#define VIVS_DE_DEST_CONFIG_SWIZZLE(x) (((x) << VIVS_DE_DEST_CONFIG_SWIZZLE__SHIFT) & VIVS_DE_DEST_CONFIG_SWIZZLE__MASK) +#define VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL__MASK 0x00300000 +#define VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL__SHIFT 20 +#define VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL(x) (((x) << VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL__SHIFT) & VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL__MASK) +#define VIVS_DE_DEST_CONFIG_GDI_STRE__MASK 0x01000000 +#define VIVS_DE_DEST_CONFIG_GDI_STRE__SHIFT 24 +#define VIVS_DE_DEST_CONFIG_GDI_STRE_DISABLE 0x00000000 +#define VIVS_DE_DEST_CONFIG_GDI_STRE_ENABLE 0x01000000 +#define VIVS_DE_DEST_CONFIG_INTER_TILE_PER_FIX__MASK 0x02000000 +#define VIVS_DE_DEST_CONFIG_INTER_TILE_PER_FIX__SHIFT 25 +#define VIVS_DE_DEST_CONFIG_INTER_TILE_PER_FIX_DISABLED 0x02000000 +#define VIVS_DE_DEST_CONFIG_INTER_TILE_PER_FIX_ENABLED 0x00000000 +#define VIVS_DE_DEST_CONFIG_MINOR_TILED__MASK 0x04000000 +#define VIVS_DE_DEST_CONFIG_MINOR_TILED__SHIFT 26 +#define VIVS_DE_DEST_CONFIG_MINOR_TILED_DISABLE 0x00000000 +#define VIVS_DE_DEST_CONFIG_MINOR_TILED_ENABLE 0x04000000 + +#define VIVS_DE_PATTERN_ADDRESS 0x00001238 + +#define VIVS_DE_PATTERN_CONFIG 0x0000123c +#define VIVS_DE_PATTERN_CONFIG_FORMAT__MASK 0x0000000f +#define VIVS_DE_PATTERN_CONFIG_FORMAT__SHIFT 0 +#define VIVS_DE_PATTERN_CONFIG_FORMAT(x) (((x) << VIVS_DE_PATTERN_CONFIG_FORMAT__SHIFT) & VIVS_DE_PATTERN_CONFIG_FORMAT__MASK) +#define VIVS_DE_PATTERN_CONFIG_TYPE__MASK 0x00000010 +#define VIVS_DE_PATTERN_CONFIG_TYPE__SHIFT 4 +#define VIVS_DE_PATTERN_CONFIG_TYPE_SOLID_COLOR 0x00000000 +#define VIVS_DE_PATTERN_CONFIG_TYPE_PATTERN 0x00000010 +#define VIVS_DE_PATTERN_CONFIG_COLOR_CONVERT__MASK 0x00000020 +#define VIVS_DE_PATTERN_CONFIG_COLOR_CONVERT__SHIFT 5 +#define VIVS_DE_PATTERN_CONFIG_COLOR_CONVERT_DISABLE 0x00000000 +#define VIVS_DE_PATTERN_CONFIG_COLOR_CONVERT_ENABLE 0x00000020 +#define VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER__MASK 0x000000c0 +#define VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER__SHIFT 6 +#define VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER(x) (((x) << VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER__SHIFT) & VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER__MASK) +#define VIVS_DE_PATTERN_CONFIG_ORIGIN_X__MASK 0x00070000 +#define VIVS_DE_PATTERN_CONFIG_ORIGIN_X__SHIFT 16 +#define VIVS_DE_PATTERN_CONFIG_ORIGIN_X(x) (((x) << VIVS_DE_PATTERN_CONFIG_ORIGIN_X__SHIFT) & VIVS_DE_PATTERN_CONFIG_ORIGIN_X__MASK) +#define VIVS_DE_PATTERN_CONFIG_ORIGIN_Y__MASK 0x00700000 +#define VIVS_DE_PATTERN_CONFIG_ORIGIN_Y__SHIFT 20 +#define VIVS_DE_PATTERN_CONFIG_ORIGIN_Y(x) (((x) << VIVS_DE_PATTERN_CONFIG_ORIGIN_Y__SHIFT) & VIVS_DE_PATTERN_CONFIG_ORIGIN_Y__MASK) + +#define VIVS_DE_PATTERN_LOW 0x00001240 + +#define VIVS_DE_PATTERN_HIGH 0x00001244 + +#define VIVS_DE_PATTERN_MASK_LOW 0x00001248 + +#define VIVS_DE_PATTERN_MASK_HIGH 0x0000124c + +#define VIVS_DE_PATTERN_BG_COLOR 0x00001250 + +#define VIVS_DE_PATTERN_FG_COLOR 0x00001254 + +#define VIVS_DE_ROP 0x0000125c +#define VIVS_DE_ROP_ROP_FG__MASK 0x000000ff +#define VIVS_DE_ROP_ROP_FG__SHIFT 0 +#define VIVS_DE_ROP_ROP_FG(x) (((x) << VIVS_DE_ROP_ROP_FG__SHIFT) & VIVS_DE_ROP_ROP_FG__MASK) +#define VIVS_DE_ROP_ROP_BG__MASK 0x0000ff00 +#define VIVS_DE_ROP_ROP_BG__SHIFT 8 +#define VIVS_DE_ROP_ROP_BG(x) (((x) << VIVS_DE_ROP_ROP_BG__SHIFT) & VIVS_DE_ROP_ROP_BG__MASK) +#define VIVS_DE_ROP_TYPE__MASK 0x00300000 +#define VIVS_DE_ROP_TYPE__SHIFT 20 +#define VIVS_DE_ROP_TYPE_ROP2_PATTERN 0x00000000 +#define VIVS_DE_ROP_TYPE_ROP2_SOURCE 0x00100000 +#define VIVS_DE_ROP_TYPE_ROP3 0x00200000 +#define VIVS_DE_ROP_TYPE_ROP4 0x00300000 + +#define VIVS_DE_CLIP_TOP_LEFT 0x00001260 +#define VIVS_DE_CLIP_TOP_LEFT_X__MASK 0x00007fff +#define VIVS_DE_CLIP_TOP_LEFT_X__SHIFT 0 +#define VIVS_DE_CLIP_TOP_LEFT_X(x) (((x) << VIVS_DE_CLIP_TOP_LEFT_X__SHIFT) & VIVS_DE_CLIP_TOP_LEFT_X__MASK) +#define VIVS_DE_CLIP_TOP_LEFT_Y__MASK 0x7fff0000 +#define VIVS_DE_CLIP_TOP_LEFT_Y__SHIFT 16 +#define VIVS_DE_CLIP_TOP_LEFT_Y(x) (((x) << VIVS_DE_CLIP_TOP_LEFT_Y__SHIFT) & VIVS_DE_CLIP_TOP_LEFT_Y__MASK) + +#define VIVS_DE_CLIP_BOTTOM_RIGHT 0x00001264 +#define VIVS_DE_CLIP_BOTTOM_RIGHT_X__MASK 0x00007fff +#define VIVS_DE_CLIP_BOTTOM_RIGHT_X__SHIFT 0 +#define VIVS_DE_CLIP_BOTTOM_RIGHT_X(x) (((x) << VIVS_DE_CLIP_BOTTOM_RIGHT_X__SHIFT) & VIVS_DE_CLIP_BOTTOM_RIGHT_X__MASK) +#define VIVS_DE_CLIP_BOTTOM_RIGHT_Y__MASK 0x7fff0000 +#define VIVS_DE_CLIP_BOTTOM_RIGHT_Y__SHIFT 16 +#define VIVS_DE_CLIP_BOTTOM_RIGHT_Y(x) (((x) << VIVS_DE_CLIP_BOTTOM_RIGHT_Y__SHIFT) & VIVS_DE_CLIP_BOTTOM_RIGHT_Y__MASK) + +#define VIVS_DE_CLEAR_BYTE_MASK 0x00001268 + +#define VIVS_DE_CONFIG 0x0000126c +#define VIVS_DE_CONFIG_MIRROR_BLT_ENABLE__MASK 0x00000001 +#define VIVS_DE_CONFIG_MIRROR_BLT_ENABLE__SHIFT 0 +#define VIVS_DE_CONFIG_MIRROR_BLT_ENABLE_OFF 0x00000000 +#define VIVS_DE_CONFIG_MIRROR_BLT_ENABLE_ON 0x00000001 +#define VIVS_DE_CONFIG_MIRROR_BLT_MODE__MASK 0x00000030 +#define VIVS_DE_CONFIG_MIRROR_BLT_MODE__SHIFT 4 +#define VIVS_DE_CONFIG_MIRROR_BLT_MODE_NORMAL 0x00000000 +#define VIVS_DE_CONFIG_MIRROR_BLT_MODE_HMIRROR 0x00000010 +#define VIVS_DE_CONFIG_MIRROR_BLT_MODE_VMIRROR 0x00000020 +#define VIVS_DE_CONFIG_MIRROR_BLT_MODE_FULL_MIRROR 0x00000030 +#define VIVS_DE_CONFIG_SOURCE_SELECT__MASK 0x00070000 +#define VIVS_DE_CONFIG_SOURCE_SELECT__SHIFT 16 +#define VIVS_DE_CONFIG_SOURCE_SELECT(x) (((x) << VIVS_DE_CONFIG_SOURCE_SELECT__SHIFT) & VIVS_DE_CONFIG_SOURCE_SELECT__MASK) +#define VIVS_DE_CONFIG_DESTINATION_SELECT__MASK 0x00300000 +#define VIVS_DE_CONFIG_DESTINATION_SELECT__SHIFT 20 +#define VIVS_DE_CONFIG_DESTINATION_SELECT(x) (((x) << VIVS_DE_CONFIG_DESTINATION_SELECT__SHIFT) & VIVS_DE_CONFIG_DESTINATION_SELECT__MASK) + +#define VIVS_DE_CLEAR_PIXEL_VALUE_LOW 0x00001270 + +#define VIVS_DE_CLEAR_PIXEL_VALUE_HIGH 0x00001274 + +#define VIVS_DE_SRC_ORIGIN_FRACTION 0x00001278 +#define VIVS_DE_SRC_ORIGIN_FRACTION_X__MASK 0x0000ffff +#define VIVS_DE_SRC_ORIGIN_FRACTION_X__SHIFT 0 +#define VIVS_DE_SRC_ORIGIN_FRACTION_X(x) (((x) << VIVS_DE_SRC_ORIGIN_FRACTION_X__SHIFT) & VIVS_DE_SRC_ORIGIN_FRACTION_X__MASK) +#define VIVS_DE_SRC_ORIGIN_FRACTION_Y__MASK 0xffff0000 +#define VIVS_DE_SRC_ORIGIN_FRACTION_Y__SHIFT 16 +#define VIVS_DE_SRC_ORIGIN_FRACTION_Y(x) (((x) << VIVS_DE_SRC_ORIGIN_FRACTION_Y__SHIFT) & VIVS_DE_SRC_ORIGIN_FRACTION_Y__MASK) + +#define VIVS_DE_ALPHA_CONTROL 0x0000127c +#define VIVS_DE_ALPHA_CONTROL_ENABLE__MASK 0x00000001 +#define VIVS_DE_ALPHA_CONTROL_ENABLE__SHIFT 0 +#define VIVS_DE_ALPHA_CONTROL_ENABLE_OFF 0x00000000 +#define VIVS_DE_ALPHA_CONTROL_ENABLE_ON 0x00000001 +#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK 0x00ff0000 +#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT 16 +#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA(x) (((x) << VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT) & VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK) +#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK 0xff000000 +#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT 24 +#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA(x) (((x) << VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT) & VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK) + +#define VIVS_DE_ALPHA_MODES 0x00001280 +#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_MODE__MASK 0x00000001 +#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_MODE__SHIFT 0 +#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_MODE_INVERSED 0x00000001 +#define VIVS_DE_ALPHA_MODES_DST_ALPHA_MODE__MASK 0x00000010 +#define VIVS_DE_ALPHA_MODES_DST_ALPHA_MODE__SHIFT 4 +#define VIVS_DE_ALPHA_MODES_DST_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_ALPHA_MODES_DST_ALPHA_MODE_INVERSED 0x00000010 +#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__MASK 0x00000300 +#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__SHIFT 8 +#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_GLOBAL 0x00000100 +#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_SCALED 0x00000200 +#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__MASK 0x00003000 +#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__SHIFT 12 +#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_GLOBAL 0x00001000 +#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_SCALED 0x00002000 +#define VIVS_DE_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__MASK 0x00010000 +#define VIVS_DE_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__SHIFT 16 +#define VIVS_DE_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_ENABLE 0x00010000 +#define VIVS_DE_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__MASK 0x00100000 +#define VIVS_DE_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__SHIFT 20 +#define VIVS_DE_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_ENABLE 0x00100000 +#define VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE__MASK 0x07000000 +#define VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT 24 +#define VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE(x) (((x) << VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT) & VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE__MASK) +#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_FACTOR__MASK 0x08000000 +#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_FACTOR__SHIFT 27 +#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_FACTOR_DISABLE 0x00000000 +#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_FACTOR_ENABLE 0x08000000 +#define VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE__MASK 0x70000000 +#define VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE__SHIFT 28 +#define VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE(x) (((x) << VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE__SHIFT) & VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE__MASK) +#define VIVS_DE_ALPHA_MODES_DST_ALPHA_FACTOR__MASK 0x80000000 +#define VIVS_DE_ALPHA_MODES_DST_ALPHA_FACTOR__SHIFT 31 +#define VIVS_DE_ALPHA_MODES_DST_ALPHA_FACTOR_DISABLE 0x00000000 +#define VIVS_DE_ALPHA_MODES_DST_ALPHA_FACTOR_ENABLE 0x80000000 + +#define VIVS_DE_UPLANE_ADDRESS 0x00001284 + +#define VIVS_DE_UPLANE_STRIDE 0x00001288 +#define VIVS_DE_UPLANE_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_DE_UPLANE_STRIDE_STRIDE__SHIFT 0 +#define VIVS_DE_UPLANE_STRIDE_STRIDE(x) (((x) << VIVS_DE_UPLANE_STRIDE_STRIDE__SHIFT) & VIVS_DE_UPLANE_STRIDE_STRIDE__MASK) + +#define VIVS_DE_VPLANE_ADDRESS 0x0000128c + +#define VIVS_DE_VPLANE_STRIDE 0x00001290 +#define VIVS_DE_VPLANE_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_DE_VPLANE_STRIDE_STRIDE__SHIFT 0 +#define VIVS_DE_VPLANE_STRIDE_STRIDE(x) (((x) << VIVS_DE_VPLANE_STRIDE_STRIDE__SHIFT) & VIVS_DE_VPLANE_STRIDE_STRIDE__MASK) + +#define VIVS_DE_VR_CONFIG 0x00001294 +#define VIVS_DE_VR_CONFIG_START__MASK 0x00000003 +#define VIVS_DE_VR_CONFIG_START__SHIFT 0 +#define VIVS_DE_VR_CONFIG_START_HORIZONTAL_BLIT 0x00000000 +#define VIVS_DE_VR_CONFIG_START_VERTICAL_BLIT 0x00000001 +#define VIVS_DE_VR_CONFIG_START_ONE_PASS_BLIT 0x00000002 +#define VIVS_DE_VR_CONFIG_START_MASK 0x00000008 + +#define VIVS_DE_VR_SOURCE_IMAGE_LOW 0x00001298 +#define VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT__MASK 0x0000ffff +#define VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT__SHIFT 0 +#define VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT(x) (((x) << VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT__SHIFT) & VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT__MASK) +#define VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP__MASK 0xffff0000 +#define VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP__SHIFT 16 +#define VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP(x) (((x) << VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP__SHIFT) & VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP__MASK) + +#define VIVS_DE_VR_SOURCE_IMAGE_HIGH 0x0000129c +#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT__MASK 0x0000ffff +#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT__SHIFT 0 +#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT(x) (((x) << VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT__SHIFT) & VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT__MASK) +#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM__MASK 0xffff0000 +#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM__SHIFT 16 +#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM(x) (((x) << VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM__SHIFT) & VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM__MASK) + +#define VIVS_DE_VR_SOURCE_ORIGIN_LOW 0x000012a0 +#define VIVS_DE_VR_SOURCE_ORIGIN_LOW_X__MASK 0xffffffff +#define VIVS_DE_VR_SOURCE_ORIGIN_LOW_X__SHIFT 0 +#define VIVS_DE_VR_SOURCE_ORIGIN_LOW_X(x) (((x) << VIVS_DE_VR_SOURCE_ORIGIN_LOW_X__SHIFT) & VIVS_DE_VR_SOURCE_ORIGIN_LOW_X__MASK) + +#define VIVS_DE_VR_SOURCE_ORIGIN_HIGH 0x000012a4 +#define VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y__MASK 0xffffffff +#define VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y__SHIFT 0 +#define VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y(x) (((x) << VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y__SHIFT) & VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y__MASK) + +#define VIVS_DE_VR_TARGET_WINDOW_LOW 0x000012a8 +#define VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT__MASK 0x0000ffff +#define VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT__SHIFT 0 +#define VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT(x) (((x) << VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT__SHIFT) & VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT__MASK) +#define VIVS_DE_VR_TARGET_WINDOW_LOW_TOP__MASK 0xffff0000 +#define VIVS_DE_VR_TARGET_WINDOW_LOW_TOP__SHIFT 16 +#define VIVS_DE_VR_TARGET_WINDOW_LOW_TOP(x) (((x) << VIVS_DE_VR_TARGET_WINDOW_LOW_TOP__SHIFT) & VIVS_DE_VR_TARGET_WINDOW_LOW_TOP__MASK) + +#define VIVS_DE_VR_TARGET_WINDOW_HIGH 0x000012ac +#define VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT__MASK 0x0000ffff +#define VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT__SHIFT 0 +#define VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT(x) (((x) << VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT__SHIFT) & VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT__MASK) +#define VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM__MASK 0xffff0000 +#define VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM__SHIFT 16 +#define VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM(x) (((x) << VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM__SHIFT) & VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM__MASK) + +#define VIVS_DE_PE_CONFIG 0x000012b0 +#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH__MASK 0x00000003 +#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH__SHIFT 0 +#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH_DISABLE 0x00000000 +#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH_DEFAULT 0x00000001 +#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH_ALWAYS 0x00000002 +#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH_MASK 0x00000008 + +#define VIVS_DE_DEST_ROTATION_HEIGHT 0x000012b4 +#define VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT__MASK 0x0000ffff +#define VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT__SHIFT 0 +#define VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT(x) (((x) << VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT__SHIFT) & VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT__MASK) + +#define VIVS_DE_SRC_ROTATION_HEIGHT 0x000012b8 +#define VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT__MASK 0x0000ffff +#define VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT 0 +#define VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT(x) (((x) << VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT) & VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT__MASK) + +#define VIVS_DE_ROT_ANGLE 0x000012bc +#define VIVS_DE_ROT_ANGLE_SRC__MASK 0x00000007 +#define VIVS_DE_ROT_ANGLE_SRC__SHIFT 0 +#define VIVS_DE_ROT_ANGLE_SRC(x) (((x) << VIVS_DE_ROT_ANGLE_SRC__SHIFT) & VIVS_DE_ROT_ANGLE_SRC__MASK) +#define VIVS_DE_ROT_ANGLE_DST__MASK 0x00000038 +#define VIVS_DE_ROT_ANGLE_DST__SHIFT 3 +#define VIVS_DE_ROT_ANGLE_DST(x) (((x) << VIVS_DE_ROT_ANGLE_DST__SHIFT) & VIVS_DE_ROT_ANGLE_DST__MASK) +#define VIVS_DE_ROT_ANGLE_SRC_MASK 0x00000100 +#define VIVS_DE_ROT_ANGLE_DST_MASK 0x00000200 +#define VIVS_DE_ROT_ANGLE_SRC_MIRROR__MASK 0x00003000 +#define VIVS_DE_ROT_ANGLE_SRC_MIRROR__SHIFT 12 +#define VIVS_DE_ROT_ANGLE_SRC_MIRROR(x) (((x) << VIVS_DE_ROT_ANGLE_SRC_MIRROR__SHIFT) & VIVS_DE_ROT_ANGLE_SRC_MIRROR__MASK) +#define VIVS_DE_ROT_ANGLE_SRC_MIRROR_MASK 0x00008000 +#define VIVS_DE_ROT_ANGLE_DST_MIRROR__MASK 0x00030000 +#define VIVS_DE_ROT_ANGLE_DST_MIRROR__SHIFT 16 +#define VIVS_DE_ROT_ANGLE_DST_MIRROR(x) (((x) << VIVS_DE_ROT_ANGLE_DST_MIRROR__SHIFT) & VIVS_DE_ROT_ANGLE_DST_MIRROR__MASK) +#define VIVS_DE_ROT_ANGLE_DST_MIRROR_MASK 0x00080000 + +#define VIVS_DE_CLEAR_PIXEL_VALUE32 0x000012c0 + +#define VIVS_DE_DEST_COLOR_KEY 0x000012c4 + +#define VIVS_DE_GLOBAL_SRC_COLOR 0x000012c8 + +#define VIVS_DE_GLOBAL_DEST_COLOR 0x000012cc + +#define VIVS_DE_COLOR_MULTIPLY_MODES 0x000012d0 +#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__MASK 0x00000001 +#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__SHIFT 0 +#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE 0x00000001 +#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__MASK 0x00000010 +#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__SHIFT 4 +#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_ENABLE 0x00000010 +#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__MASK 0x00000300 +#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__SHIFT 8 +#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_ALPHA 0x00000100 +#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_COLOR 0x00000200 +#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__MASK 0x00100000 +#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__SHIFT 20 +#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE 0x00100000 + +#define VIVS_DE_PE_TRANSPARENCY 0x000012d4 +#define VIVS_DE_PE_TRANSPARENCY_SOURCE__MASK 0x00000003 +#define VIVS_DE_PE_TRANSPARENCY_SOURCE__SHIFT 0 +#define VIVS_DE_PE_TRANSPARENCY_SOURCE_OPAQUE 0x00000000 +#define VIVS_DE_PE_TRANSPARENCY_SOURCE_MASK 0x00000001 +#define VIVS_DE_PE_TRANSPARENCY_SOURCE_KEY 0x00000002 +#define VIVS_DE_PE_TRANSPARENCY_PATTERN__MASK 0x00000030 +#define VIVS_DE_PE_TRANSPARENCY_PATTERN__SHIFT 4 +#define VIVS_DE_PE_TRANSPARENCY_PATTERN_OPAQUE 0x00000000 +#define VIVS_DE_PE_TRANSPARENCY_PATTERN_MASK 0x00000010 +#define VIVS_DE_PE_TRANSPARENCY_PATTERN_KEY 0x00000020 +#define VIVS_DE_PE_TRANSPARENCY_DESTINATION__MASK 0x00000300 +#define VIVS_DE_PE_TRANSPARENCY_DESTINATION__SHIFT 8 +#define VIVS_DE_PE_TRANSPARENCY_DESTINATION_OPAQUE 0x00000000 +#define VIVS_DE_PE_TRANSPARENCY_DESTINATION_MASK 0x00000100 +#define VIVS_DE_PE_TRANSPARENCY_DESTINATION_KEY 0x00000200 +#define VIVS_DE_PE_TRANSPARENCY_TRANSPARENCY_MASK 0x00001000 +#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE__MASK 0x00030000 +#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE__SHIFT 16 +#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE_DEFAULT 0x00000000 +#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE_USE_ENABLE 0x00010000 +#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE_USE_DISABLE 0x00020000 +#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE__MASK 0x00300000 +#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE__SHIFT 20 +#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE_DEFAULT 0x00000000 +#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE_USE_ENABLE 0x00100000 +#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE_USE_DISABLE 0x00200000 +#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE__MASK 0x03000000 +#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE__SHIFT 24 +#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE_DEFAULT 0x00000000 +#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE_USE_ENABLE 0x01000000 +#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE_USE_DISABLE 0x02000000 +#define VIVS_DE_PE_TRANSPARENCY_RESOURCE_OVERRIDE_MASK 0x10000000 +#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY__MASK 0x20000000 +#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY__SHIFT 29 +#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY_DISABLE 0x00000000 +#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY_ENABLE 0x20000000 +#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY_MASK 0x80000000 + +#define VIVS_DE_PE_CONTROL 0x000012d8 +#define VIVS_DE_PE_CONTROL_YUV__MASK 0x00000001 +#define VIVS_DE_PE_CONTROL_YUV__SHIFT 0 +#define VIVS_DE_PE_CONTROL_YUV_601 0x00000000 +#define VIVS_DE_PE_CONTROL_YUV_709 0x00000001 +#define VIVS_DE_PE_CONTROL_YUV_MASK 0x00000008 +#define VIVS_DE_PE_CONTROL_UV_SWIZZLE__MASK 0x00000010 +#define VIVS_DE_PE_CONTROL_UV_SWIZZLE__SHIFT 4 +#define VIVS_DE_PE_CONTROL_UV_SWIZZLE_UV 0x00000000 +#define VIVS_DE_PE_CONTROL_UV_SWIZZLE_VU 0x00000010 +#define VIVS_DE_PE_CONTROL_UV_SWIZZLE_MASK 0x00000080 +#define VIVS_DE_PE_CONTROL_YUVRGB__MASK 0x00000100 +#define VIVS_DE_PE_CONTROL_YUVRGB__SHIFT 8 +#define VIVS_DE_PE_CONTROL_YUVRGB_DISABLE 0x00000000 +#define VIVS_DE_PE_CONTROL_YUVRGB_ENABLE 0x00000100 +#define VIVS_DE_PE_CONTROL_YUVRGB_MASK 0x00000800 + +#define VIVS_DE_SRC_COLOR_KEY_HIGH 0x000012dc + +#define VIVS_DE_DEST_COLOR_KEY_HIGH 0x000012e0 + +#define VIVS_DE_VR_CONFIG_EX 0x000012e4 +#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH__MASK 0x00000003 +#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH__SHIFT 0 +#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_AUTO 0x00000000 +#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_PIXELS16 0x00000001 +#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_PIXELS32 0x00000002 +#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_MASK 0x00000008 +#define VIVS_DE_VR_CONFIG_EX_FILTER_TAP__MASK 0x000000f0 +#define VIVS_DE_VR_CONFIG_EX_FILTER_TAP__SHIFT 4 +#define VIVS_DE_VR_CONFIG_EX_FILTER_TAP(x) (((x) << VIVS_DE_VR_CONFIG_EX_FILTER_TAP__SHIFT) & VIVS_DE_VR_CONFIG_EX_FILTER_TAP__MASK) +#define VIVS_DE_VR_CONFIG_EX_FILTER_TAP_MASK 0x00000100 + +#define VIVS_DE_PE_DITHER_LOW 0x000012e8 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0__MASK 0x0000000f +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0__SHIFT 0 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0__MASK) +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0__MASK 0x000000f0 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0__SHIFT 4 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0__MASK) +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0__MASK 0x00000f00 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0__SHIFT 8 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0__MASK) +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0__MASK 0x0000f000 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0__SHIFT 12 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0__MASK) +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1__MASK 0x000f0000 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1__SHIFT 16 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1__MASK) +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1__MASK 0x00f00000 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1__SHIFT 20 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1__MASK) +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1__MASK 0x0f000000 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1__SHIFT 24 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1__MASK) +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1__MASK 0xf0000000 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1__SHIFT 28 +#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1__MASK) + +#define VIVS_DE_PE_DITHER_HIGH 0x000012ec +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2__MASK 0x0000000f +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2__SHIFT 0 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2__MASK) +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2__MASK 0x000000f0 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2__SHIFT 4 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2__MASK) +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2__MASK 0x00000f00 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2__SHIFT 8 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2__MASK) +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2__MASK 0x0000f000 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2__SHIFT 12 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2__MASK) +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3__MASK 0x000f0000 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3__SHIFT 16 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3__MASK) +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3__MASK 0x00f00000 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3__SHIFT 20 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3__MASK) +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3__MASK 0x0f000000 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3__SHIFT 24 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3__MASK) +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3__MASK 0xf0000000 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3__SHIFT 28 +#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3__MASK) + +#define VIVS_DE_BW_CONFIG 0x000012f0 +#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG__MASK 0x00000001 +#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG__SHIFT 0 +#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG_AUTO 0x00000000 +#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG_CUSTOMIZE 0x00000001 +#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG_MASK 0x00000008 +#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION__MASK 0x00000010 +#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION__SHIFT 4 +#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION_RIGHT_BOTTOM 0x00000000 +#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION_BOTTOM_RIGHT 0x00000010 +#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION_MASK 0x00000080 +#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION__MASK 0x00000100 +#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION__SHIFT 8 +#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION_RIGHT_BOTTOM 0x00000000 +#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION_BOTTOM_RIGHT 0x00000100 +#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION_MASK 0x00000800 +#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION__MASK 0x00001000 +#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION__SHIFT 12 +#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION_RIGHT_BOTTOM 0x00000000 +#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION_BOTTOM_RIGHT 0x00001000 +#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION_MASK 0x00008000 + +#define VIVS_DE_BW_BLOCK_SIZE 0x000012f4 +#define VIVS_DE_BW_BLOCK_SIZE_WIDTH__MASK 0x0000ffff +#define VIVS_DE_BW_BLOCK_SIZE_WIDTH__SHIFT 0 +#define VIVS_DE_BW_BLOCK_SIZE_WIDTH(x) (((x) << VIVS_DE_BW_BLOCK_SIZE_WIDTH__SHIFT) & VIVS_DE_BW_BLOCK_SIZE_WIDTH__MASK) +#define VIVS_DE_BW_BLOCK_SIZE_HEIGHT__MASK 0xffff0000 +#define VIVS_DE_BW_BLOCK_SIZE_HEIGHT__SHIFT 16 +#define VIVS_DE_BW_BLOCK_SIZE_HEIGHT(x) (((x) << VIVS_DE_BW_BLOCK_SIZE_HEIGHT__SHIFT) & VIVS_DE_BW_BLOCK_SIZE_HEIGHT__MASK) + +#define VIVS_DE_BW_TILE_SIZE 0x000012f8 +#define VIVS_DE_BW_TILE_SIZE_WIDTH__MASK 0x0000ffff +#define VIVS_DE_BW_TILE_SIZE_WIDTH__SHIFT 0 +#define VIVS_DE_BW_TILE_SIZE_WIDTH(x) (((x) << VIVS_DE_BW_TILE_SIZE_WIDTH__SHIFT) & VIVS_DE_BW_TILE_SIZE_WIDTH__MASK) +#define VIVS_DE_BW_TILE_SIZE_HEIGHT__MASK 0xffff0000 +#define VIVS_DE_BW_TILE_SIZE_HEIGHT__SHIFT 16 +#define VIVS_DE_BW_TILE_SIZE_HEIGHT(x) (((x) << VIVS_DE_BW_TILE_SIZE_HEIGHT__SHIFT) & VIVS_DE_BW_TILE_SIZE_HEIGHT__MASK) + +#define VIVS_DE_BW_BLOCK_MASK 0x000012fc +#define VIVS_DE_BW_BLOCK_MASK_HORIZONTAL__MASK 0x0000ffff +#define VIVS_DE_BW_BLOCK_MASK_HORIZONTAL__SHIFT 0 +#define VIVS_DE_BW_BLOCK_MASK_HORIZONTAL(x) (((x) << VIVS_DE_BW_BLOCK_MASK_HORIZONTAL__SHIFT) & VIVS_DE_BW_BLOCK_MASK_HORIZONTAL__MASK) +#define VIVS_DE_BW_BLOCK_MASK_VERTICAL__MASK 0xffff0000 +#define VIVS_DE_BW_BLOCK_MASK_VERTICAL__SHIFT 16 +#define VIVS_DE_BW_BLOCK_MASK_VERTICAL(x) (((x) << VIVS_DE_BW_BLOCK_MASK_VERTICAL__SHIFT) & VIVS_DE_BW_BLOCK_MASK_VERTICAL__MASK) + +#define VIVS_DE_SRC_EX_CONFIG 0x00001300 +#define VIVS_DE_SRC_EX_CONFIG_MULTI_TILED__MASK 0x00000001 +#define VIVS_DE_SRC_EX_CONFIG_MULTI_TILED__SHIFT 0 +#define VIVS_DE_SRC_EX_CONFIG_MULTI_TILED_DISABLE 0x00000000 +#define VIVS_DE_SRC_EX_CONFIG_MULTI_TILED_ENABLE 0x00000001 +#define VIVS_DE_SRC_EX_CONFIG_SUPER_TILED__MASK 0x00000008 +#define VIVS_DE_SRC_EX_CONFIG_SUPER_TILED__SHIFT 3 +#define VIVS_DE_SRC_EX_CONFIG_SUPER_TILED_DISABLE 0x00000000 +#define VIVS_DE_SRC_EX_CONFIG_SUPER_TILED_ENABLE 0x00000008 +#define VIVS_DE_SRC_EX_CONFIG_MINOR_TILED__MASK 0x00000100 +#define VIVS_DE_SRC_EX_CONFIG_MINOR_TILED__SHIFT 8 +#define VIVS_DE_SRC_EX_CONFIG_MINOR_TILED_DISABLE 0x00000000 +#define VIVS_DE_SRC_EX_CONFIG_MINOR_TILED_ENABLE 0x00000100 + +#define VIVS_DE_SRC_EX_ADDRESS 0x00001304 + +#define VIVS_DE_DE_MULTI_SOURCE 0x00001308 +#define VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE__MASK 0x00000007 +#define VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE__SHIFT 0 +#define VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE(x) (((x) << VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE__SHIFT) & VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE__MASK) +#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK__MASK 0x00000700 +#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK__SHIFT 8 +#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL16 0x00000000 +#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL32 0x00000100 +#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL64 0x00000200 +#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL128 0x00000300 +#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL256 0x00000400 +#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL512 0x00000500 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK__MASK 0x00070000 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK__SHIFT 16 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE1 0x00000000 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE2 0x00010000 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE4 0x00020000 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE8 0x00030000 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE16 0x00040000 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE32 0x00050000 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE64 0x00060000 +#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE128 0x00070000 + +#define VIVS_DE_DEYUV_CONVERSION 0x0000130c +#define VIVS_DE_DEYUV_CONVERSION_ENABLE__MASK 0x00000003 +#define VIVS_DE_DEYUV_CONVERSION_ENABLE__SHIFT 0 +#define VIVS_DE_DEYUV_CONVERSION_ENABLE_OFF 0x00000000 +#define VIVS_DE_DEYUV_CONVERSION_ENABLE_PLANE1 0x00000001 +#define VIVS_DE_DEYUV_CONVERSION_ENABLE_PLANE2 0x00000002 +#define VIVS_DE_DEYUV_CONVERSION_ENABLE_PLANE3 0x00000003 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT__MASK 0x0000000c +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT__SHIFT 2 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT__MASK 0x00000030 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT__SHIFT 4 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT__MASK 0x000000c0 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT__SHIFT 6 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B__MASK 0x00000300 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B__SHIFT 8 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G__MASK 0x00000c00 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G__SHIFT 10 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R__MASK 0x00003000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R__SHIFT 12 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A__MASK 0x0000c000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A__SHIFT 14 +#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B__MASK 0x00030000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B__SHIFT 16 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G__MASK 0x000c0000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G__SHIFT 18 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R__MASK 0x00300000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R__SHIFT 20 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A__MASK 0x00c00000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A__SHIFT 22 +#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B__MASK 0x03000000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B__SHIFT 24 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G__MASK 0x0c000000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G__SHIFT 26 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R__MASK 0x30000000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R__SHIFT 28 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R__MASK) +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A__MASK 0xc0000000 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A__SHIFT 30 +#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A__MASK) + +#define VIVS_DE_DE_PLANE2_ADDRESS 0x00001310 + +#define VIVS_DE_DE_PLANE2_STRIDE 0x00001314 +#define VIVS_DE_DE_PLANE2_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_DE_DE_PLANE2_STRIDE_STRIDE__SHIFT 0 +#define VIVS_DE_DE_PLANE2_STRIDE_STRIDE(x) (((x) << VIVS_DE_DE_PLANE2_STRIDE_STRIDE__SHIFT) & VIVS_DE_DE_PLANE2_STRIDE_STRIDE__MASK) + +#define VIVS_DE_DE_PLANE3_ADDRESS 0x00001318 + +#define VIVS_DE_DE_PLANE3_STRIDE 0x0000131c +#define VIVS_DE_DE_PLANE3_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_DE_DE_PLANE3_STRIDE_STRIDE__SHIFT 0 +#define VIVS_DE_DE_PLANE3_STRIDE_STRIDE(x) (((x) << VIVS_DE_DE_PLANE3_STRIDE_STRIDE__SHIFT) & VIVS_DE_DE_PLANE3_STRIDE_STRIDE__MASK) + +#define VIVS_DE_DE_STALL_DE 0x00001320 +#define VIVS_DE_DE_STALL_DE_ENABLE__MASK 0x00000001 +#define VIVS_DE_DE_STALL_DE_ENABLE__SHIFT 0 +#define VIVS_DE_DE_STALL_DE_ENABLE_DISABLE 0x00000000 +#define VIVS_DE_DE_STALL_DE_ENABLE_ENABLE 0x00000001 + +#define VIVS_DE_FILTER_KERNEL(i0) (0x00001800 + 0x4*(i0)) +#define VIVS_DE_FILTER_KERNEL__ESIZE 0x00000004 +#define VIVS_DE_FILTER_KERNEL__LEN 0x00000080 +#define VIVS_DE_FILTER_KERNEL_COEFFICIENT0__MASK 0x0000ffff +#define VIVS_DE_FILTER_KERNEL_COEFFICIENT0__SHIFT 0 +#define VIVS_DE_FILTER_KERNEL_COEFFICIENT0(x) (((x) << VIVS_DE_FILTER_KERNEL_COEFFICIENT0__SHIFT) & VIVS_DE_FILTER_KERNEL_COEFFICIENT0__MASK) +#define VIVS_DE_FILTER_KERNEL_COEFFICIENT1__MASK 0xffff0000 +#define VIVS_DE_FILTER_KERNEL_COEFFICIENT1__SHIFT 16 +#define VIVS_DE_FILTER_KERNEL_COEFFICIENT1(x) (((x) << VIVS_DE_FILTER_KERNEL_COEFFICIENT1__SHIFT) & VIVS_DE_FILTER_KERNEL_COEFFICIENT1__MASK) + +#define VIVS_DE_INDEX_COLOR_TABLE(i0) (0x00001c00 + 0x4*(i0)) +#define VIVS_DE_INDEX_COLOR_TABLE__ESIZE 0x00000004 +#define VIVS_DE_INDEX_COLOR_TABLE__LEN 0x00000100 + +#define VIVS_DE_HORI_FILTER_KERNEL(i0) (0x00002800 + 0x4*(i0)) +#define VIVS_DE_HORI_FILTER_KERNEL__ESIZE 0x00000004 +#define VIVS_DE_HORI_FILTER_KERNEL__LEN 0x00000080 +#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0__MASK 0x0000ffff +#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0__SHIFT 0 +#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0(x) (((x) << VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0__SHIFT) & VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0__MASK) +#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1__MASK 0xffff0000 +#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1__SHIFT 16 +#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1(x) (((x) << VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1__SHIFT) & VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1__MASK) + +#define VIVS_DE_VERTI_FILTER_KERNEL(i0) (0x00002a00 + 0x4*(i0)) +#define VIVS_DE_VERTI_FILTER_KERNEL__ESIZE 0x00000004 +#define VIVS_DE_VERTI_FILTER_KERNEL__LEN 0x00000080 +#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0__MASK 0x0000ffff +#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0__SHIFT 0 +#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0(x) (((x) << VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0__SHIFT) & VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0__MASK) +#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1__MASK 0xffff0000 +#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1__SHIFT 16 +#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1(x) (((x) << VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1__SHIFT) & VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1__MASK) + +#define VIVS_DE_INDEX_COLOR_TABLE32(i0) (0x00003400 + 0x4*(i0)) +#define VIVS_DE_INDEX_COLOR_TABLE32__ESIZE 0x00000004 +#define VIVS_DE_INDEX_COLOR_TABLE32__LEN 0x00000100 + +#define VIVS_DE_BLOCK4 0x00000000 + +#define VIVS_DE_BLOCK4_SRC_ADDRESS(i0) (0x00012800 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_ADDRESS__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_ADDRESS__LEN 0x00000004 + +#define VIVS_DE_BLOCK4_SRC_STRIDE(i0) (0x00012810 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_STRIDE__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_STRIDE__LEN 0x00000004 +#define VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE__SHIFT 0 +#define VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE(x) (((x) << VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE__SHIFT) & VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE__MASK) + +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG(i0) (0x00012820 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG__LEN 0x00000004 +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH__MASK 0x0000ffff +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH__SHIFT 0 +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH(x) (((x) << VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH__SHIFT) & VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH__MASK) +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_ROTATION__MASK 0x00010000 +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_ROTATION__SHIFT 16 +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_ROTATION_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_ROTATION_ENABLE 0x00010000 + +#define VIVS_DE_BLOCK4_SRC_CONFIG(i0) (0x00012830 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_CONFIG__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_CONFIG__LEN 0x00000004 +#define VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK 0x0000000f +#define VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT 0 +#define VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK) +#define VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY__MASK 0x00000030 +#define VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY__SHIFT 4 +#define VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY__MASK) +#define VIVS_DE_BLOCK4_SRC_CONFIG_SRC_RELATIVE__MASK 0x00000040 +#define VIVS_DE_BLOCK4_SRC_CONFIG_SRC_RELATIVE__SHIFT 6 +#define VIVS_DE_BLOCK4_SRC_CONFIG_SRC_RELATIVE_ABSOLUTE 0x00000000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_SRC_RELATIVE_RELATIVE 0x00000040 +#define VIVS_DE_BLOCK4_SRC_CONFIG_TILED__MASK 0x00000080 +#define VIVS_DE_BLOCK4_SRC_CONFIG_TILED__SHIFT 7 +#define VIVS_DE_BLOCK4_SRC_CONFIG_TILED_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_TILED_ENABLE 0x00000080 +#define VIVS_DE_BLOCK4_SRC_CONFIG_LOCATION__MASK 0x00000100 +#define VIVS_DE_BLOCK4_SRC_CONFIG_LOCATION__SHIFT 8 +#define VIVS_DE_BLOCK4_SRC_CONFIG_LOCATION_MEMORY 0x00000000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_LOCATION_STREAM 0x00000100 +#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK__MASK 0x00003000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK__SHIFT 12 +#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK_PACKED8 0x00000000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK_PACKED16 0x00001000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK_PACKED32 0x00002000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK_UNPACKED 0x00003000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY__MASK 0x00008000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY__SHIFT 15 +#define VIVS_DE_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY_BACKGROUND 0x00000000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY_FOREGROUND 0x00008000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_UNK16 0x00010000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE__MASK 0x00300000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE__SHIFT 20 +#define VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE__MASK) +#define VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT__MASK 0x1f000000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT__SHIFT 24 +#define VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT__MASK) +#define VIVS_DE_BLOCK4_SRC_CONFIG_DISABLE420_L2_CACHE 0x20000000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL__MASK 0xc0000000 +#define VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL__SHIFT 30 +#define VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL__MASK) + +#define VIVS_DE_BLOCK4_SRC_ORIGIN(i0) (0x00012840 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_ORIGIN__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_ORIGIN__LEN 0x00000004 +#define VIVS_DE_BLOCK4_SRC_ORIGIN_X__MASK 0x0000ffff +#define VIVS_DE_BLOCK4_SRC_ORIGIN_X__SHIFT 0 +#define VIVS_DE_BLOCK4_SRC_ORIGIN_X(x) (((x) << VIVS_DE_BLOCK4_SRC_ORIGIN_X__SHIFT) & VIVS_DE_BLOCK4_SRC_ORIGIN_X__MASK) +#define VIVS_DE_BLOCK4_SRC_ORIGIN_Y__MASK 0xffff0000 +#define VIVS_DE_BLOCK4_SRC_ORIGIN_Y__SHIFT 16 +#define VIVS_DE_BLOCK4_SRC_ORIGIN_Y(x) (((x) << VIVS_DE_BLOCK4_SRC_ORIGIN_Y__SHIFT) & VIVS_DE_BLOCK4_SRC_ORIGIN_Y__MASK) + +#define VIVS_DE_BLOCK4_SRC_SIZE(i0) (0x00012850 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_SIZE__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_SIZE__LEN 0x00000004 +#define VIVS_DE_BLOCK4_SRC_SIZE_X__MASK 0x0000ffff +#define VIVS_DE_BLOCK4_SRC_SIZE_X__SHIFT 0 +#define VIVS_DE_BLOCK4_SRC_SIZE_X(x) (((x) << VIVS_DE_BLOCK4_SRC_SIZE_X__SHIFT) & VIVS_DE_BLOCK4_SRC_SIZE_X__MASK) +#define VIVS_DE_BLOCK4_SRC_SIZE_Y__MASK 0xffff0000 +#define VIVS_DE_BLOCK4_SRC_SIZE_Y__SHIFT 16 +#define VIVS_DE_BLOCK4_SRC_SIZE_Y(x) (((x) << VIVS_DE_BLOCK4_SRC_SIZE_Y__SHIFT) & VIVS_DE_BLOCK4_SRC_SIZE_Y__MASK) + +#define VIVS_DE_BLOCK4_SRC_COLOR_BG(i0) (0x00012860 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_COLOR_BG__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_COLOR_BG__LEN 0x00000004 + +#define VIVS_DE_BLOCK4_ROP(i0) (0x00012870 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_ROP__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_ROP__LEN 0x00000004 +#define VIVS_DE_BLOCK4_ROP_ROP_FG__MASK 0x000000ff +#define VIVS_DE_BLOCK4_ROP_ROP_FG__SHIFT 0 +#define VIVS_DE_BLOCK4_ROP_ROP_FG(x) (((x) << VIVS_DE_BLOCK4_ROP_ROP_FG__SHIFT) & VIVS_DE_BLOCK4_ROP_ROP_FG__MASK) +#define VIVS_DE_BLOCK4_ROP_ROP_BG__MASK 0x0000ff00 +#define VIVS_DE_BLOCK4_ROP_ROP_BG__SHIFT 8 +#define VIVS_DE_BLOCK4_ROP_ROP_BG(x) (((x) << VIVS_DE_BLOCK4_ROP_ROP_BG__SHIFT) & VIVS_DE_BLOCK4_ROP_ROP_BG__MASK) +#define VIVS_DE_BLOCK4_ROP_TYPE__MASK 0x00300000 +#define VIVS_DE_BLOCK4_ROP_TYPE__SHIFT 20 +#define VIVS_DE_BLOCK4_ROP_TYPE_ROP2_PATTERN 0x00000000 +#define VIVS_DE_BLOCK4_ROP_TYPE_ROP2_SOURCE 0x00100000 +#define VIVS_DE_BLOCK4_ROP_TYPE_ROP3 0x00200000 +#define VIVS_DE_BLOCK4_ROP_TYPE_ROP4 0x00300000 + +#define VIVS_DE_BLOCK4_ALPHA_CONTROL(i0) (0x00012880 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_ALPHA_CONTROL__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL__LEN 0x00000004 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_ENABLE__MASK 0x00000001 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_ENABLE__SHIFT 0 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_ENABLE_OFF 0x00000000 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_ENABLE_ON 0x00000001 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK 0x00ff0000 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT 16 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA(x) (((x) << VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT) & VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK) +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK 0xff000000 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT 24 +#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA(x) (((x) << VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT) & VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK) + +#define VIVS_DE_BLOCK4_ALPHA_MODES(i0) (0x00012890 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_ALPHA_MODES__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_ALPHA_MODES__LEN 0x00000004 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE__MASK 0x00000001 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE__SHIFT 0 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE_INVERSED 0x00000001 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE__MASK 0x00000010 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE__SHIFT 4 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE_INVERSED 0x00000010 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__MASK 0x00000300 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__SHIFT 8 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_GLOBAL 0x00000100 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_SCALED 0x00000200 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__MASK 0x00003000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__SHIFT 12 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_GLOBAL 0x00001000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_SCALED 0x00002000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__MASK 0x00010000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__SHIFT 16 +#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_ENABLE 0x00010000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__MASK 0x00100000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__SHIFT 20 +#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_ENABLE 0x00100000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE__MASK 0x07000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT 24 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE(x) (((x) << VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT) & VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE__MASK) +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR__MASK 0x08000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR__SHIFT 27 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR_ENABLE 0x08000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE__MASK 0x70000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE__SHIFT 28 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE(x) (((x) << VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE__SHIFT) & VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE__MASK) +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR__MASK 0x80000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR__SHIFT 31 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR_ENABLE 0x80000000 + +#define VIVS_DE_BLOCK4_ADDRESS_U(i0) (0x000128a0 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_ADDRESS_U__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_ADDRESS_U__LEN 0x00000004 + +#define VIVS_DE_BLOCK4_STRIDE_U(i0) (0x000128b0 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_STRIDE_U__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_STRIDE_U__LEN 0x00000004 +#define VIVS_DE_BLOCK4_STRIDE_U_STRIDE__MASK 0x0003ffff +#define VIVS_DE_BLOCK4_STRIDE_U_STRIDE__SHIFT 0 +#define VIVS_DE_BLOCK4_STRIDE_U_STRIDE(x) (((x) << VIVS_DE_BLOCK4_STRIDE_U_STRIDE__SHIFT) & VIVS_DE_BLOCK4_STRIDE_U_STRIDE__MASK) + +#define VIVS_DE_BLOCK4_ADDRESS_V(i0) (0x000128c0 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_ADDRESS_V__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_ADDRESS_V__LEN 0x00000004 + +#define VIVS_DE_BLOCK4_STRIDE_V(i0) (0x000128d0 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_STRIDE_V__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_STRIDE_V__LEN 0x00000004 +#define VIVS_DE_BLOCK4_STRIDE_V_STRIDE__MASK 0x0003ffff +#define VIVS_DE_BLOCK4_STRIDE_V_STRIDE__SHIFT 0 +#define VIVS_DE_BLOCK4_STRIDE_V_STRIDE(x) (((x) << VIVS_DE_BLOCK4_STRIDE_V_STRIDE__SHIFT) & VIVS_DE_BLOCK4_STRIDE_V_STRIDE__MASK) + +#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT(i0) (0x000128e0 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT__LEN 0x00000004 +#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT__MASK 0x0000ffff +#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT 0 +#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT(x) (((x) << VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT) & VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT__MASK) + +#define VIVS_DE_BLOCK4_ROT_ANGLE(i0) (0x000128f0 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_ROT_ANGLE__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_ROT_ANGLE__LEN 0x00000004 +#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC__MASK 0x00000007 +#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC__SHIFT 0 +#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC(x) (((x) << VIVS_DE_BLOCK4_ROT_ANGLE_SRC__SHIFT) & VIVS_DE_BLOCK4_ROT_ANGLE_SRC__MASK) +#define VIVS_DE_BLOCK4_ROT_ANGLE_DST__MASK 0x00000038 +#define VIVS_DE_BLOCK4_ROT_ANGLE_DST__SHIFT 3 +#define VIVS_DE_BLOCK4_ROT_ANGLE_DST(x) (((x) << VIVS_DE_BLOCK4_ROT_ANGLE_DST__SHIFT) & VIVS_DE_BLOCK4_ROT_ANGLE_DST__MASK) +#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MASK 0x00000100 +#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MASK 0x00000200 +#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR__MASK 0x00003000 +#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR__SHIFT 12 +#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR(x) (((x) << VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR__SHIFT) & VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR__MASK) +#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR_MASK 0x00008000 +#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR__MASK 0x00030000 +#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR__SHIFT 16 +#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR(x) (((x) << VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR__SHIFT) & VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR__MASK) +#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR_MASK 0x00080000 + +#define VIVS_DE_BLOCK4_GLOBAL_SRC_COLOR(i0) (0x00012900 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_GLOBAL_SRC_COLOR__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_GLOBAL_SRC_COLOR__LEN 0x00000004 + +#define VIVS_DE_BLOCK4_GLOBAL_DEST_COLOR(i0) (0x00012910 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_GLOBAL_DEST_COLOR__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_GLOBAL_DEST_COLOR__LEN 0x00000004 + +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES(i0) (0x00012920 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES__LEN 0x00000004 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__MASK 0x00000001 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__SHIFT 0 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE 0x00000001 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__MASK 0x00000010 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__SHIFT 4 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_ENABLE 0x00000010 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__MASK 0x00000300 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__SHIFT 8 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_ALPHA 0x00000100 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_COLOR 0x00000200 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__MASK 0x00100000 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__SHIFT 20 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE 0x00100000 + +#define VIVS_DE_BLOCK4_TRANSPARENCY(i0) (0x00012930 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_TRANSPARENCY__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_TRANSPARENCY__LEN 0x00000004 +#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE__MASK 0x00000003 +#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE__SHIFT 0 +#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE_OPAQUE 0x00000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE_MASK 0x00000001 +#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE_KEY 0x00000002 +#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN__MASK 0x00000030 +#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN__SHIFT 4 +#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN_OPAQUE 0x00000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN_MASK 0x00000010 +#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN_KEY 0x00000020 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION__MASK 0x00000300 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION__SHIFT 8 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION_OPAQUE 0x00000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION_MASK 0x00000100 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION_KEY 0x00000200 +#define VIVS_DE_BLOCK4_TRANSPARENCY_TRANSPARENCY_MASK 0x00001000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE__MASK 0x00030000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE__SHIFT 16 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_DEFAULT 0x00000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_USE_ENABLE 0x00010000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_USE_DISABLE 0x00020000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE__MASK 0x00300000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE__SHIFT 20 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_DEFAULT 0x00000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_USE_ENABLE 0x00100000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_USE_DISABLE 0x00200000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE__MASK 0x03000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE__SHIFT 24 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_DEFAULT 0x00000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_USE_ENABLE 0x01000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_USE_DISABLE 0x02000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_RESOURCE_OVERRIDE_MASK 0x10000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY__MASK 0x20000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY__SHIFT 29 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_ENABLE 0x20000000 +#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_MASK 0x80000000 + +#define VIVS_DE_BLOCK4_CONTROL(i0) (0x00012940 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_CONTROL__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_CONTROL__LEN 0x00000004 +#define VIVS_DE_BLOCK4_CONTROL_YUV__MASK 0x00000001 +#define VIVS_DE_BLOCK4_CONTROL_YUV__SHIFT 0 +#define VIVS_DE_BLOCK4_CONTROL_YUV_601 0x00000000 +#define VIVS_DE_BLOCK4_CONTROL_YUV_709 0x00000001 +#define VIVS_DE_BLOCK4_CONTROL_YUV_MASK 0x00000008 +#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE__MASK 0x00000010 +#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE__SHIFT 4 +#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE_UV 0x00000000 +#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE_VU 0x00000010 +#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE_MASK 0x00000080 +#define VIVS_DE_BLOCK4_CONTROL_YUVRGB__MASK 0x00000100 +#define VIVS_DE_BLOCK4_CONTROL_YUVRGB__SHIFT 8 +#define VIVS_DE_BLOCK4_CONTROL_YUVRGB_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_CONTROL_YUVRGB_ENABLE 0x00000100 +#define VIVS_DE_BLOCK4_CONTROL_YUVRGB_MASK 0x00000800 + +#define VIVS_DE_BLOCK4_SRC_COLOR_KEY_HIGH(i0) (0x00012950 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_COLOR_KEY_HIGH__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_COLOR_KEY_HIGH__LEN 0x00000004 + +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG(i0) (0x00012960 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG__LEN 0x00000004 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MULTI_TILED__MASK 0x00000001 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MULTI_TILED__SHIFT 0 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MULTI_TILED_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MULTI_TILED_ENABLE 0x00000001 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_SUPER_TILED__MASK 0x00000008 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_SUPER_TILED__SHIFT 3 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_SUPER_TILED_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_SUPER_TILED_ENABLE 0x00000008 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MINOR_TILED__MASK 0x00000100 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MINOR_TILED__SHIFT 8 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MINOR_TILED_DISABLE 0x00000000 +#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MINOR_TILED_ENABLE 0x00000100 + +#define VIVS_DE_BLOCK4_SRC_EX_ADDRESS(i0) (0x00012970 + 0x4*(i0)) +#define VIVS_DE_BLOCK4_SRC_EX_ADDRESS__ESIZE 0x00000004 +#define VIVS_DE_BLOCK4_SRC_EX_ADDRESS__LEN 0x00000004 + +#define VIVS_DE_BLOCK8 0x00000000 + +#define VIVS_DE_BLOCK8_SRC_ADDRESS(i0) (0x00012a00 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_ADDRESS__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_ADDRESS__LEN 0x00000008 + +#define VIVS_DE_BLOCK8_SRC_STRIDE(i0) (0x00012a20 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_STRIDE__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_STRIDE__LEN 0x00000008 +#define VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE__SHIFT 0 +#define VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE(x) (((x) << VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE__SHIFT) & VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE__MASK) + +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG(i0) (0x00012a40 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG__LEN 0x00000008 +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH__MASK 0x0000ffff +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH__SHIFT 0 +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH(x) (((x) << VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH__SHIFT) & VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH__MASK) +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_ROTATION__MASK 0x00010000 +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_ROTATION__SHIFT 16 +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_ROTATION_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_ROTATION_ENABLE 0x00010000 + +#define VIVS_DE_BLOCK8_SRC_CONFIG(i0) (0x00012a60 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_CONFIG__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_CONFIG__LEN 0x00000008 +#define VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK 0x0000000f +#define VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT 0 +#define VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK) +#define VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY__MASK 0x00000030 +#define VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY__SHIFT 4 +#define VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY__MASK) +#define VIVS_DE_BLOCK8_SRC_CONFIG_SRC_RELATIVE__MASK 0x00000040 +#define VIVS_DE_BLOCK8_SRC_CONFIG_SRC_RELATIVE__SHIFT 6 +#define VIVS_DE_BLOCK8_SRC_CONFIG_SRC_RELATIVE_ABSOLUTE 0x00000000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_SRC_RELATIVE_RELATIVE 0x00000040 +#define VIVS_DE_BLOCK8_SRC_CONFIG_TILED__MASK 0x00000080 +#define VIVS_DE_BLOCK8_SRC_CONFIG_TILED__SHIFT 7 +#define VIVS_DE_BLOCK8_SRC_CONFIG_TILED_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_TILED_ENABLE 0x00000080 +#define VIVS_DE_BLOCK8_SRC_CONFIG_LOCATION__MASK 0x00000100 +#define VIVS_DE_BLOCK8_SRC_CONFIG_LOCATION__SHIFT 8 +#define VIVS_DE_BLOCK8_SRC_CONFIG_LOCATION_MEMORY 0x00000000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_LOCATION_STREAM 0x00000100 +#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK__MASK 0x00003000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK__SHIFT 12 +#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK_PACKED8 0x00000000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK_PACKED16 0x00001000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK_PACKED32 0x00002000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK_UNPACKED 0x00003000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY__MASK 0x00008000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY__SHIFT 15 +#define VIVS_DE_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY_BACKGROUND 0x00000000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY_FOREGROUND 0x00008000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_UNK16 0x00010000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE__MASK 0x00300000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE__SHIFT 20 +#define VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE__MASK) +#define VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT__MASK 0x1f000000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT__SHIFT 24 +#define VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT__MASK) +#define VIVS_DE_BLOCK8_SRC_CONFIG_DISABLE420_L2_CACHE 0x20000000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL__MASK 0xc0000000 +#define VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL__SHIFT 30 +#define VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL__MASK) + +#define VIVS_DE_BLOCK8_SRC_ORIGIN(i0) (0x00012a80 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_ORIGIN__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_ORIGIN__LEN 0x00000008 +#define VIVS_DE_BLOCK8_SRC_ORIGIN_X__MASK 0x0000ffff +#define VIVS_DE_BLOCK8_SRC_ORIGIN_X__SHIFT 0 +#define VIVS_DE_BLOCK8_SRC_ORIGIN_X(x) (((x) << VIVS_DE_BLOCK8_SRC_ORIGIN_X__SHIFT) & VIVS_DE_BLOCK8_SRC_ORIGIN_X__MASK) +#define VIVS_DE_BLOCK8_SRC_ORIGIN_Y__MASK 0xffff0000 +#define VIVS_DE_BLOCK8_SRC_ORIGIN_Y__SHIFT 16 +#define VIVS_DE_BLOCK8_SRC_ORIGIN_Y(x) (((x) << VIVS_DE_BLOCK8_SRC_ORIGIN_Y__SHIFT) & VIVS_DE_BLOCK8_SRC_ORIGIN_Y__MASK) + +#define VIVS_DE_BLOCK8_SRC_SIZE(i0) (0x00012aa0 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_SIZE__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_SIZE__LEN 0x00000008 +#define VIVS_DE_BLOCK8_SRC_SIZE_X__MASK 0x0000ffff +#define VIVS_DE_BLOCK8_SRC_SIZE_X__SHIFT 0 +#define VIVS_DE_BLOCK8_SRC_SIZE_X(x) (((x) << VIVS_DE_BLOCK8_SRC_SIZE_X__SHIFT) & VIVS_DE_BLOCK8_SRC_SIZE_X__MASK) +#define VIVS_DE_BLOCK8_SRC_SIZE_Y__MASK 0xffff0000 +#define VIVS_DE_BLOCK8_SRC_SIZE_Y__SHIFT 16 +#define VIVS_DE_BLOCK8_SRC_SIZE_Y(x) (((x) << VIVS_DE_BLOCK8_SRC_SIZE_Y__SHIFT) & VIVS_DE_BLOCK8_SRC_SIZE_Y__MASK) + +#define VIVS_DE_BLOCK8_SRC_COLOR_BG(i0) (0x00012ac0 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_COLOR_BG__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_COLOR_BG__LEN 0x00000008 + +#define VIVS_DE_BLOCK8_ROP(i0) (0x00012ae0 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_ROP__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_ROP__LEN 0x00000008 +#define VIVS_DE_BLOCK8_ROP_ROP_FG__MASK 0x000000ff +#define VIVS_DE_BLOCK8_ROP_ROP_FG__SHIFT 0 +#define VIVS_DE_BLOCK8_ROP_ROP_FG(x) (((x) << VIVS_DE_BLOCK8_ROP_ROP_FG__SHIFT) & VIVS_DE_BLOCK8_ROP_ROP_FG__MASK) +#define VIVS_DE_BLOCK8_ROP_ROP_BG__MASK 0x0000ff00 +#define VIVS_DE_BLOCK8_ROP_ROP_BG__SHIFT 8 +#define VIVS_DE_BLOCK8_ROP_ROP_BG(x) (((x) << VIVS_DE_BLOCK8_ROP_ROP_BG__SHIFT) & VIVS_DE_BLOCK8_ROP_ROP_BG__MASK) +#define VIVS_DE_BLOCK8_ROP_TYPE__MASK 0x00300000 +#define VIVS_DE_BLOCK8_ROP_TYPE__SHIFT 20 +#define VIVS_DE_BLOCK8_ROP_TYPE_ROP2_PATTERN 0x00000000 +#define VIVS_DE_BLOCK8_ROP_TYPE_ROP2_SOURCE 0x00100000 +#define VIVS_DE_BLOCK8_ROP_TYPE_ROP3 0x00200000 +#define VIVS_DE_BLOCK8_ROP_TYPE_ROP4 0x00300000 + +#define VIVS_DE_BLOCK8_ALPHA_CONTROL(i0) (0x00012b00 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_ALPHA_CONTROL__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL__LEN 0x00000008 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_ENABLE__MASK 0x00000001 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_ENABLE__SHIFT 0 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_ENABLE_OFF 0x00000000 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_ENABLE_ON 0x00000001 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK 0x00ff0000 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT 16 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA(x) (((x) << VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT) & VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK) +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK 0xff000000 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT 24 +#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA(x) (((x) << VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT) & VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK) + +#define VIVS_DE_BLOCK8_ALPHA_MODES(i0) (0x00012b20 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_ALPHA_MODES__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_ALPHA_MODES__LEN 0x00000008 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE__MASK 0x00000001 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE__SHIFT 0 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE_INVERSED 0x00000001 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE__MASK 0x00000010 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE__SHIFT 4 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE_INVERSED 0x00000010 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__MASK 0x00000300 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__SHIFT 8 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_GLOBAL 0x00000100 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_SCALED 0x00000200 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__MASK 0x00003000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__SHIFT 12 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_NORMAL 0x00000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_GLOBAL 0x00001000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_SCALED 0x00002000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__MASK 0x00010000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__SHIFT 16 +#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_ENABLE 0x00010000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__MASK 0x00100000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__SHIFT 20 +#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_ENABLE 0x00100000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE__MASK 0x07000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT 24 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE(x) (((x) << VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT) & VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE__MASK) +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR__MASK 0x08000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR__SHIFT 27 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR_ENABLE 0x08000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE__MASK 0x70000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE__SHIFT 28 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE(x) (((x) << VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE__SHIFT) & VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE__MASK) +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR__MASK 0x80000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR__SHIFT 31 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR_ENABLE 0x80000000 + +#define VIVS_DE_BLOCK8_ADDRESS_U(i0) (0x00012b40 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_ADDRESS_U__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_ADDRESS_U__LEN 0x00000008 + +#define VIVS_DE_BLOCK8_STRIDE_U(i0) (0x00012b60 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_STRIDE_U__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_STRIDE_U__LEN 0x00000008 +#define VIVS_DE_BLOCK8_STRIDE_U_STRIDE__MASK 0x0003ffff +#define VIVS_DE_BLOCK8_STRIDE_U_STRIDE__SHIFT 0 +#define VIVS_DE_BLOCK8_STRIDE_U_STRIDE(x) (((x) << VIVS_DE_BLOCK8_STRIDE_U_STRIDE__SHIFT) & VIVS_DE_BLOCK8_STRIDE_U_STRIDE__MASK) + +#define VIVS_DE_BLOCK8_ADDRESS_V(i0) (0x00012b80 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_ADDRESS_V__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_ADDRESS_V__LEN 0x00000008 + +#define VIVS_DE_BLOCK8_STRIDE_V(i0) (0x00012ba0 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_STRIDE_V__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_STRIDE_V__LEN 0x00000008 +#define VIVS_DE_BLOCK8_STRIDE_V_STRIDE__MASK 0x0003ffff +#define VIVS_DE_BLOCK8_STRIDE_V_STRIDE__SHIFT 0 +#define VIVS_DE_BLOCK8_STRIDE_V_STRIDE(x) (((x) << VIVS_DE_BLOCK8_STRIDE_V_STRIDE__SHIFT) & VIVS_DE_BLOCK8_STRIDE_V_STRIDE__MASK) + +#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT(i0) (0x00012bc0 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT__LEN 0x00000008 +#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT__MASK 0x0000ffff +#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT 0 +#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT(x) (((x) << VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT) & VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT__MASK) + +#define VIVS_DE_BLOCK8_ROT_ANGLE(i0) (0x00012be0 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_ROT_ANGLE__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_ROT_ANGLE__LEN 0x00000008 +#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC__MASK 0x00000007 +#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC__SHIFT 0 +#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC(x) (((x) << VIVS_DE_BLOCK8_ROT_ANGLE_SRC__SHIFT) & VIVS_DE_BLOCK8_ROT_ANGLE_SRC__MASK) +#define VIVS_DE_BLOCK8_ROT_ANGLE_DST__MASK 0x00000038 +#define VIVS_DE_BLOCK8_ROT_ANGLE_DST__SHIFT 3 +#define VIVS_DE_BLOCK8_ROT_ANGLE_DST(x) (((x) << VIVS_DE_BLOCK8_ROT_ANGLE_DST__SHIFT) & VIVS_DE_BLOCK8_ROT_ANGLE_DST__MASK) +#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MASK 0x00000100 +#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MASK 0x00000200 +#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR__MASK 0x00003000 +#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR__SHIFT 12 +#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR(x) (((x) << VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR__SHIFT) & VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR__MASK) +#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR_MASK 0x00008000 +#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR__MASK 0x00030000 +#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR__SHIFT 16 +#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR(x) (((x) << VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR__SHIFT) & VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR__MASK) +#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR_MASK 0x00080000 + +#define VIVS_DE_BLOCK8_GLOBAL_SRC_COLOR(i0) (0x00012c00 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_GLOBAL_SRC_COLOR__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_GLOBAL_SRC_COLOR__LEN 0x00000008 + +#define VIVS_DE_BLOCK8_GLOBAL_DEST_COLOR(i0) (0x00012c20 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_GLOBAL_DEST_COLOR__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_GLOBAL_DEST_COLOR__LEN 0x00000008 + +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES(i0) (0x00012c40 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES__LEN 0x00000008 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__MASK 0x00000001 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__SHIFT 0 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE 0x00000001 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__MASK 0x00000010 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__SHIFT 4 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_ENABLE 0x00000010 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__MASK 0x00000300 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__SHIFT 8 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_ALPHA 0x00000100 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_COLOR 0x00000200 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__MASK 0x00100000 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__SHIFT 20 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE 0x00100000 + +#define VIVS_DE_BLOCK8_TRANSPARENCY(i0) (0x00012c60 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_TRANSPARENCY__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_TRANSPARENCY__LEN 0x00000008 +#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE__MASK 0x00000003 +#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE__SHIFT 0 +#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE_OPAQUE 0x00000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE_MASK 0x00000001 +#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE_KEY 0x00000002 +#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN__MASK 0x00000030 +#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN__SHIFT 4 +#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN_OPAQUE 0x00000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN_MASK 0x00000010 +#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN_KEY 0x00000020 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION__MASK 0x00000300 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION__SHIFT 8 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION_OPAQUE 0x00000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION_MASK 0x00000100 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION_KEY 0x00000200 +#define VIVS_DE_BLOCK8_TRANSPARENCY_TRANSPARENCY_MASK 0x00001000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE__MASK 0x00030000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE__SHIFT 16 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_DEFAULT 0x00000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_USE_ENABLE 0x00010000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_USE_DISABLE 0x00020000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE__MASK 0x00300000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE__SHIFT 20 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_DEFAULT 0x00000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_USE_ENABLE 0x00100000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_USE_DISABLE 0x00200000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE__MASK 0x03000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE__SHIFT 24 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_DEFAULT 0x00000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_USE_ENABLE 0x01000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_USE_DISABLE 0x02000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_RESOURCE_OVERRIDE_MASK 0x10000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY__MASK 0x20000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY__SHIFT 29 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_ENABLE 0x20000000 +#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_MASK 0x80000000 + +#define VIVS_DE_BLOCK8_CONTROL(i0) (0x00012c80 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_CONTROL__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_CONTROL__LEN 0x00000008 +#define VIVS_DE_BLOCK8_CONTROL_YUV__MASK 0x00000001 +#define VIVS_DE_BLOCK8_CONTROL_YUV__SHIFT 0 +#define VIVS_DE_BLOCK8_CONTROL_YUV_601 0x00000000 +#define VIVS_DE_BLOCK8_CONTROL_YUV_709 0x00000001 +#define VIVS_DE_BLOCK8_CONTROL_YUV_MASK 0x00000008 +#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE__MASK 0x00000010 +#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE__SHIFT 4 +#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE_UV 0x00000000 +#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE_VU 0x00000010 +#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE_MASK 0x00000080 +#define VIVS_DE_BLOCK8_CONTROL_YUVRGB__MASK 0x00000100 +#define VIVS_DE_BLOCK8_CONTROL_YUVRGB__SHIFT 8 +#define VIVS_DE_BLOCK8_CONTROL_YUVRGB_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_CONTROL_YUVRGB_ENABLE 0x00000100 +#define VIVS_DE_BLOCK8_CONTROL_YUVRGB_MASK 0x00000800 + +#define VIVS_DE_BLOCK8_SRC_COLOR_KEY_HIGH(i0) (0x00012ca0 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_COLOR_KEY_HIGH__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_COLOR_KEY_HIGH__LEN 0x00000008 + +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG(i0) (0x00012cc0 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG__LEN 0x00000008 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MULTI_TILED__MASK 0x00000001 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MULTI_TILED__SHIFT 0 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MULTI_TILED_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MULTI_TILED_ENABLE 0x00000001 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_SUPER_TILED__MASK 0x00000008 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_SUPER_TILED__SHIFT 3 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_SUPER_TILED_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_SUPER_TILED_ENABLE 0x00000008 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MINOR_TILED__MASK 0x00000100 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MINOR_TILED__SHIFT 8 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MINOR_TILED_DISABLE 0x00000000 +#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MINOR_TILED_ENABLE 0x00000100 + +#define VIVS_DE_BLOCK8_SRC_EX_ADDRESS(i0) (0x00012ce0 + 0x4*(i0)) +#define VIVS_DE_BLOCK8_SRC_EX_ADDRESS__ESIZE 0x00000004 +#define VIVS_DE_BLOCK8_SRC_EX_ADDRESS__LEN 0x00000008 + + +#endif /* STATE_2D_XML */ diff --git a/tests/etnaviv/write_bmp.c b/tests/etnaviv/write_bmp.c new file mode 100644 index 0000000..7ae0646 --- /dev/null +++ b/tests/etnaviv/write_bmp.c @@ -0,0 +1,151 @@ +/* + * Copyright 2011 Luc Verhaegen <[email protected]> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ +/* + * Quick 'n Dirty bitmap dumper. + */ +#include <stdio.h> +#include <unistd.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <fcntl.h> +#include <string.h> +#include <errno.h> + +#include "write_bmp.h" + +#define FILENAME_SIZE 1024 + +struct bmp_header { + unsigned short magic; + unsigned int size; + unsigned int unused; + unsigned int start; +} __attribute__((__packed__)); + +struct dib_header { + unsigned int size; + unsigned int width; + unsigned int height; + unsigned short planes; + unsigned short bpp; + unsigned int compression; + unsigned int data_size; + unsigned int h_res; + unsigned int v_res; + unsigned int colours; + unsigned int important_colours; + unsigned int red_mask; + unsigned int green_mask; + unsigned int blue_mask; + unsigned int alpha_mask; + unsigned int colour_space; + unsigned int unused[12]; +} __attribute__((__packed__)); + +static int +bmp_header_write(int fd, int width, int height, int bgra, int noflip, int alpha) +{ + struct bmp_header bmp_header = { + .magic = 0x4d42, + .size = (width * height * 4) + + sizeof(struct bmp_header) + sizeof(struct dib_header), + .start = sizeof(struct bmp_header) + sizeof(struct dib_header), + }; + struct dib_header dib_header = { + .size = sizeof(struct dib_header), + .width = width, + .height = noflip ? -height : height, + .planes = 1, + .bpp = 32, + .compression = 3, + .data_size = 4 * width * height, + .h_res = 0xB13, + .v_res = 0xB13, + .colours = 0, + .important_colours = 0, + .red_mask = 0x000000FF, + .green_mask = 0x0000FF00, + .blue_mask = 0x00FF0000, + .alpha_mask = alpha ? 0xFF000000 : 0x00000000, + .colour_space = 0x57696E20, + }; + + if (bgra) { + dib_header.red_mask = 0x00FF0000; + dib_header.blue_mask = 0x000000FF; + } + + write(fd, &bmp_header, sizeof(struct bmp_header)); + write(fd, &dib_header, sizeof(struct dib_header)); + + return 0; +} + +void +bmp_dump32(char *buffer, unsigned width, unsigned height, bool bgra, const char *filename) +{ + int fd; + + fd = open(filename, O_WRONLY| O_TRUNC | O_CREAT, 0666); + if (fd == -1) { + printf("Failed to open %s: %s\n", filename, strerror(errno)); + return; + } + + bmp_header_write(fd, width, height, bgra, false, true); + + write(fd, buffer, width * height * 4); +} + +void +bmp_dump32_noflip(char *buffer, unsigned width, unsigned height, bool bgra, const char *filename) +{ + int fd; + + fd = open(filename, O_WRONLY| O_TRUNC | O_CREAT, 0666); + if (fd == -1) { + printf("Failed to open %s: %s\n", filename, strerror(errno)); + return; + } + + bmp_header_write(fd, width, height, bgra, true, true); + + write(fd, buffer, width * height * 4); +} + +void +bmp_dump32_ex(char *buffer, unsigned width, unsigned height, bool flip, bool bgra, bool alpha, const char *filename) +{ + int fd; + + fd = open(filename, O_WRONLY| O_TRUNC | O_CREAT, 0666); + if (fd == -1) { + printf("Failed to open %s: %s\n", filename, strerror(errno)); + return; + } + + bmp_header_write(fd, width, height, bgra, flip, alpha); + + write(fd, buffer, width * height * 4); +} diff --git a/tests/etnaviv/write_bmp.h b/tests/etnaviv/write_bmp.h new file mode 100644 index 0000000..667fa87 --- /dev/null +++ b/tests/etnaviv/write_bmp.h @@ -0,0 +1,34 @@ +/* + * Copyright 2011 Luc Verhaegen <[email protected]> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ +#ifndef BMP_DUMP_H +#define BMP_DUMP_H 1 +#include <stdbool.h> +/* write 32-bit image (y axis upwards) */ +void bmp_dump32(char *buffer, unsigned width, unsigned height, bool bgra, const char *filename); +/* write 32-bit image (y axis downwards) */ +void bmp_dump32_noflip(char *buffer, unsigned width, unsigned height, bool bgra, const char *filename); +/* write 32-bit image */ +void bmp_dump32_ex(char *buffer, unsigned width, unsigned height, bool flip, bool bgra, bool alpha, const char *filename); + +#endif /* BMP_DUMP_H */ commit 95e2cc6a801d92a0634b75fb02221213bd11e9da Author: The etnaviv authors <[email protected]> Date: Tue Sep 6 18:15:53 2016 +0200 libdrm: add etnaviv drm support Add the libdrm_etnaviv helper library to encapsulate etnaviv-specific interfaces to the DRM. Signed-off-by: Christian Gmeiner <[email protected]> Signed-off-by: Lucas Stach <[email protected]> Tested-by: Rob Herring <[email protected]> diff --git a/.gitignore b/.gitignore index a44566f..3226b3a 100644 --- a/.gitignore +++ b/.gitignore @@ -57,6 +57,7 @@ libdrm_exynos.pc libdrm_freedreno.pc libdrm_amdgpu.pc libdrm_vc4.pc +libdrm_etnaviv.pc libkms.pc libtool ltmain.sh diff --git a/Makefile.am b/Makefile.am index 2ceb352..630edc4 100644 --- a/Makefile.am +++ b/Makefile.am @@ -36,6 +36,7 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \ --enable-freedreno \ --enable-freedreno-kgsl\ --enable-tegra-experimental-api \ + --enable-etnaviv-experimental-api \ --enable-install-test-programs \ --enable-cairo-tests \ --enable-manpages \ @@ -84,6 +85,10 @@ if HAVE_VC4 VC4_SUBDIR = vc4 endif +if HAVE_ETNAVIV +ETNAVIV_SUBDIR = etnaviv +endif + if BUILD_MANPAGES if HAVE_MANPAGES_STYLESHEET MAN_SUBDIR = man @@ -102,6 +107,7 @@ SUBDIRS = \ $(FREEDRENO_SUBDIR) \ $(TEGRA_SUBDIR) \ $(VC4_SUBDIR) \ + $(ETNAVIV_SUBDIR) \ tests \ $(MAN_SUBDIR) diff --git a/configure.ac b/configure.ac index e3048c7..64f3e6c 100644 --- a/configure.ac +++ b/configure.ac @@ -132,6 +132,11 @@ AC_ARG_ENABLE(vc4, [Enable support for vc4's API (default: auto, enabled on arm)]), [VC4=$enableval], [VC4=auto]) +AC_ARG_ENABLE(etnaviv-experimental-api, + AS_HELP_STRING([--enable-etnaviv-experimental-api], + [Enable support for etnaviv's experimental API (default: disabled)]), + [ETNAVIV=$enableval], [ETNAVIV=no]) + AC_ARG_ENABLE(install-test-programs, AS_HELP_STRING([--enable-install-test-programs], [Install test programs (default: no)]), @@ -274,6 +279,9 @@ if test "x$drm_cv_atomic_primitives" = "xnone"; then LIBDRM_ATOMICS_NOT_FOUND_MSG($TEGRA, tegra, NVIDIA Tegra, tegra-experimental-api) TEGRA=no + + LIBDRM_ATOMICS_NOT_FOUND_MSG($ETNAVIV, etnaviv, Vivante, etnaviv-experimental-api) + ETNAVIV=no else if test "x$INTEL" = xauto; then case $host_cpu in @@ -413,6 +421,11 @@ if test "x$VC4" = xyes; then AC_DEFINE(HAVE_VC4, 1, [Have VC4 support]) fi +AM_CONDITIONAL(HAVE_ETNAVIV, [test "x$ETNAVIV" = xyes]) +if test "x$ETNAVIV" = xyes; then + AC_DEFINE(HAVE_ETNAVIV, 1, [Have etnaviv support]) +fi + AM_CONDITIONAL(HAVE_INSTALL_TESTS, [test "x$INSTALL_TESTS" = xyes]) if test "x$INSTALL_TESTS" = xyes; then AC_DEFINE(HAVE_INSTALL_TESTS, 1, [Install test programs]) @@ -524,6 +537,8 @@ AC_CONFIG_FILES([ tegra/libdrm_tegra.pc vc4/Makefile vc4/libdrm_vc4.pc + etnaviv/Makefile + etnaviv/libdrm_etnaviv.pc tests/Makefile tests/modeprint/Makefile tests/modetest/Makefile @@ -555,4 +570,5 @@ echo " EXYNOS API $EXYNOS" echo " Freedreno API $FREEDRENO (kgsl: $FREEDRENO_KGSL)" echo " Tegra API $TEGRA" echo " VC4 API $VC4" +echo " Etnaviv API $ETNAVIV" echo "" diff --git a/etnaviv/Android.mk b/etnaviv/Android.mk new file mode 100644 index 0000000..a3a2295 --- /dev/null +++ b/etnaviv/Android.mk @@ -0,0 +1,18 @@ +LOCAL_PATH := $(call my-dir) +include $(CLEAR_VARS) + +# Import variables LIBDRM_ETNAVIV_FILES, LIBDRM_ETNAVIV_H_FILES +include $(LOCAL_PATH)/Makefile.sources + +LOCAL_MODULE := libdrm_etnaviv +LOCAL_MODULE_TAGS := optional + +LOCAL_SHARED_LIBRARIES := libdrm + +LOCAL_SRC_FILES := $(patsubst %.h, , $(LIBDRM_ETNAVIV_FILES)) +LOCAL_EXPORT_C_INCLUDE_DIRS := $(LOCAL_PATH) + +LOCAL_CFLAGS := \ + -DHAVE_LIBDRM_ATOMIC_PRIMITIVES=1 + +include $(BUILD_SHARED_LIBRARY) diff --git a/etnaviv/Makefile.am b/etnaviv/Makefile.am new file mode 100644 index 0000000..be96ba8 --- /dev/null +++ b/etnaviv/Makefile.am @@ -0,0 +1,26 @@ +include Makefile.sources + +AM_CFLAGS = \ + $(WARN_CFLAGS) \ + -I$(top_srcdir) \ + $(PTHREADSTUBS_CFLAGS) \ + -I$(top_srcdir)/include/drm + +libdrm_etnaviv_ladir = $(libdir) +libdrm_etnaviv_la_LTLIBRARIES = libdrm_etnaviv.la +libdrm_etnaviv_la_LDFLAGS = -version-number 1:0:0 -no-undefined +libdrm_etnaviv_la_LIBADD = \ + ../libdrm.la \ + @PTHREADSTUBS_LIBS@ \ + @CLOCK_LIB@ + +libdrm_etnaviv_la_SOURCES = $(LIBDRM_ETNAVIV_FILES) + +libdrm_etnavivincludedir = ${includedir}/libdrm +libdrm_etnavivinclude_HEADERS = $(LIBDRM_ETNAVIV_H_FILES) + +pkgconfigdir = @pkgconfigdir@ +pkgconfig_DATA = libdrm_etnaviv.pc + +TESTS = etnaviv-symbol-check +EXTRA_DIST = $(TESTS) diff --git a/etnaviv/Makefile.sources b/etnaviv/Makefile.sources new file mode 100644 index 0000000..5258056 --- /dev/null +++ b/etnaviv/Makefile.sources @@ -0,0 +1,12 @@ +LIBDRM_ETNAVIV_FILES := \ + etnaviv_device.c \ + etnaviv_gpu.c \ + etnaviv_bo.c \ + etnaviv_bo_cache.c \ + etnaviv_pipe.c \ + etnaviv_cmd_stream.c \ + etnaviv_drm.h \ + etnaviv_priv.h + +LIBDRM_ETNAVIV_H_FILES := \ + etnaviv_drmif.h diff --git a/etnaviv/etnaviv-symbol-check b/etnaviv/etnaviv-symbol-check new file mode 100755 index 0000000..77c94c6 --- /dev/null +++ b/etnaviv/etnaviv-symbol-check @@ -0,0 +1,45 @@ +#!/bin/bash + +# The following symbols (past the first five) are taken from the public headers. +# A list of the latter should be available Makefile.sources/LIBDRM_ETNAVIV_H_FILES + +FUNCS=$(nm -D --format=bsd --defined-only ${1-.libs/libdrm_etnaviv.so} | awk '{print $3}'| while read func; do +( grep -q "^$func$" || echo $func ) <<EOF +__bss_start +_edata +_end +_fini +_init +etna_device_new +etna_device_ref +etna_device_del +etna_gpu_new +etna_gpu_del +etna_gpu_get_param +etna_pipe_new +etna_pipe_del +etna_pipe_wait +etna_bo_new +etna_bo_from_handle +etna_bo_from_name +etna_bo_from_dmabuf +etna_bo_ref +etna_bo_del +etna_bo_get_name +etna_bo_handle +etna_bo_dmabuf +etna_bo_size +etna_bo_map +etna_bo_cpu_prep +etna_bo_cpu_fini +etna_cmd_stream_new +etna_cmd_stream_del +etna_cmd_stream_timestamp +etna_cmd_stream_flush +etna_cmd_stream_finish +etna_cmd_stream_reloc +EOF +done) + +test ! -n "$FUNCS" || echo $FUNCS +test ! -n "$FUNCS" diff --git a/etnaviv/etnaviv_bo.c b/etnaviv/etnaviv_bo.c new file mode 100644 index 0000000..833f8bd --- /dev/null +++ b/etnaviv/etnaviv_bo.c @@ -0,0 +1,347 @@ +/* + * Copyright (C) 2014 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifdef HAVE_CONFIG_H +# include <config.h> +#endif + +#include "etnaviv_priv.h" +#include "etnaviv_drmif.h" + +drm_private pthread_mutex_t table_lock = PTHREAD_MUTEX_INITIALIZER; +drm_private void bo_del(struct etna_bo *bo); + +/* set buffer name, and add to table, call w/ table_lock held: */ +static void set_name(struct etna_bo *bo, uint32_t name) +{ + bo->name = name; + /* add ourself into the name table: */ + drmHashInsert(bo->dev->name_table, name, bo); +} + +/* Called under table_lock */ +drm_private void bo_del(struct etna_bo *bo) +{ + if (bo->map) + drm_munmap(bo->map, bo->size); + + if (bo->name) + drmHashDelete(bo->dev->name_table, bo->name); + + if (bo->handle) { + struct drm_gem_close req = { + .handle = bo->handle, + }; + + drmHashDelete(bo->dev->handle_table, bo->handle); + drmIoctl(bo->dev->fd, DRM_IOCTL_GEM_CLOSE, &req); + } + + free(bo); +} + +/* lookup a buffer from it's handle, call w/ table_lock held: */ +static struct etna_bo *lookup_bo(void *tbl, uint32_t handle) +{ + struct etna_bo *bo = NULL; + + if (!drmHashLookup(tbl, handle, (void **)&bo)) { + /* found, incr refcnt and return: */ + bo = etna_bo_ref(bo); + + /* don't break the bucket if this bo was found in one */ + list_delinit(&bo->list); + } + + return bo; +} + +/* allocate a new buffer object, call w/ table_lock held */ +static struct etna_bo *bo_from_handle(struct etna_device *dev, + uint32_t size, uint32_t handle, uint32_t flags) +{ + struct etna_bo *bo = calloc(sizeof(*bo), 1); + + if (!bo) { + struct drm_gem_close req = { + .handle = handle, + }; + + drmIoctl(dev->fd, DRM_IOCTL_GEM_CLOSE, &req); + + return NULL; + } + + bo->dev = etna_device_ref(dev); + bo->size = size; + bo->handle = handle; + bo->flags = flags; + atomic_set(&bo->refcnt, 1); + list_inithead(&bo->list); + /* add ourselves to the handle table: */ + drmHashInsert(dev->handle_table, handle, bo); + + return bo; +} + +/* allocate a new (un-tiled) buffer object */ +struct etna_bo *etna_bo_new(struct etna_device *dev, uint32_t size, + uint32_t flags) +{ + struct etna_bo *bo; + int ret; + struct drm_etnaviv_gem_new req = { + .flags = flags, + }; + + bo = etna_bo_cache_alloc(&dev->bo_cache, &size, flags); + if (bo) + return bo; + + req.size = size; + ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_GEM_NEW, + &req, sizeof(req)); + if (ret) + return NULL; + + pthread_mutex_lock(&table_lock); + bo = bo_from_handle(dev, size, req.handle, flags); + bo->reuse = 1; + pthread_mutex_unlock(&table_lock); + + return bo; +} + +struct etna_bo *etna_bo_ref(struct etna_bo *bo) +{ + atomic_inc(&bo->refcnt); + + return bo; +} + +/* get buffer info */ +static int get_buffer_info(struct etna_bo *bo) +{ + int ret; + struct drm_etnaviv_gem_info req = { + .handle = bo->handle, + }; + + ret = drmCommandWriteRead(bo->dev->fd, DRM_ETNAVIV_GEM_INFO, + &req, sizeof(req)); + if (ret) { + return ret; + } + + /* really all we need for now is mmap offset */ + bo->offset = req.offset; + + return 0; +} + +/* import a buffer object from DRI2 name */ +struct etna_bo *etna_bo_from_name(struct etna_device *dev, uint32_t name) +{ + struct etna_bo *bo; + struct drm_gem_open req = { + .name = name, + }; + + pthread_mutex_lock(&table_lock); + + /* check name table first, to see if bo is already open: */ + bo = lookup_bo(dev->name_table, req.handle); + if (bo) + goto out_unlock; + + if (drmIoctl(dev->fd, DRM_IOCTL_GEM_OPEN, &req)) { + ERROR_MSG("gem-open failed: %s", strerror(errno)); + goto out_unlock; + } + + bo = lookup_bo(dev->handle_table, req.handle); + if (bo) + goto out_unlock; + + bo = bo_from_handle(dev, req.size, req.handle, 0); + if (bo) + set_name(bo, name); + +out_unlock: + pthread_mutex_unlock(&table_lock); + + return bo; +} + +/* import a buffer from dmabuf fd, does not take ownership of the + * fd so caller should close() the fd when it is otherwise done + * with it (even if it is still using the 'struct etna_bo *') + */ +struct etna_bo *etna_bo_from_dmabuf(struct etna_device *dev, int fd) +{ + struct etna_bo *bo; + int ret, size; + uint32_t handle; + + pthread_mutex_lock(&table_lock); + + ret = drmPrimeFDToHandle(dev->fd, fd, &handle); + if (ret) { + return NULL; + } + + bo = lookup_bo(dev->handle_table, handle); + if (bo) + goto out_unlock; + + /* lseek() to get bo size */ + size = lseek(fd, 0, SEEK_END); + lseek(fd, 0, SEEK_CUR); + + bo = bo_from_handle(dev, size, handle, 0); + +out_unlock: + pthread_mutex_unlock(&table_lock); + + return bo; +} + +/* destroy a buffer object */ +void etna_bo_del(struct etna_bo *bo) +{ + struct etna_device *dev = bo->dev; + + if (!bo) + return; + + if (!atomic_dec_and_test(&bo->refcnt)) + return; + + pthread_mutex_lock(&table_lock); + + if (bo->reuse && (etna_bo_cache_free(&dev->bo_cache, bo) == 0)) + goto out; + + bo_del(bo); + etna_device_del_locked(dev); +out: + pthread_mutex_unlock(&table_lock); +} + +/* get the global flink/DRI2 buffer name */ +int etna_bo_get_name(struct etna_bo *bo, uint32_t *name) +{ + if (!bo->name) { + struct drm_gem_flink req = { + .handle = bo->handle, + }; + int ret; + + ret = drmIoctl(bo->dev->fd, DRM_IOCTL_GEM_FLINK, &req); + if (ret) { + return ret; + } + + pthread_mutex_lock(&table_lock); + set_name(bo, req.name); + pthread_mutex_unlock(&table_lock); + bo->reuse = 0; + } + + *name = bo->name; + + return 0; +} + +uint32_t etna_bo_handle(struct etna_bo *bo) +{ + return bo->handle; +} + +/* caller owns the dmabuf fd that is returned and is responsible + * to close() it when done + */ +int etna_bo_dmabuf(struct etna_bo *bo) +{ + int ret, prime_fd; + + ret = drmPrimeHandleToFD(bo->dev->fd, bo->handle, DRM_CLOEXEC, + &prime_fd); + if (ret) { + ERROR_MSG("failed to get dmabuf fd: %d", ret); + return ret; + } + + bo->reuse = 0; + + return prime_fd; +} + +uint32_t etna_bo_size(struct etna_bo *bo) +{ + return bo->size; +} + +void *etna_bo_map(struct etna_bo *bo) +{ + if (!bo->map) { + if (!bo->offset) { + get_buffer_info(bo); + } + + bo->map = drm_mmap(0, bo->size, PROT_READ | PROT_WRITE, + MAP_SHARED, bo->dev->fd, bo->offset); + if (bo->map == MAP_FAILED) { + ERROR_MSG("mmap failed: %s", strerror(errno)); + bo->map = NULL; + } + } + + return bo->map; +} + +int etna_bo_cpu_prep(struct etna_bo *bo, uint32_t op) +{ + struct drm_etnaviv_gem_cpu_prep req = { + .handle = bo->handle, + .op = op, + }; + + get_abs_timeout(&req.timeout, 5000); + + return drmCommandWrite(bo->dev->fd, DRM_ETNAVIV_GEM_CPU_PREP, + &req, sizeof(req)); +} + +void etna_bo_cpu_fini(struct etna_bo *bo) +{ + struct drm_etnaviv_gem_cpu_fini req = { + .handle = bo->handle, + }; + + drmCommandWrite(bo->dev->fd, DRM_ETNAVIV_GEM_CPU_FINI, + &req, sizeof(req)); +} diff --git a/etnaviv/etnaviv_bo_cache.c b/etnaviv/etnaviv_bo_cache.c new file mode 100644 index 0000000..8924651 --- /dev/null +++ b/etnaviv/etnaviv_bo_cache.c @@ -0,0 +1,196 @@ +/* + * Copyright (C) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifdef HAVE_CONFIG_H +# include <config.h> +#endif + +#include "etnaviv_priv.h" +#include "etnaviv_drmif.h" + +drm_private void bo_del(struct etna_bo *bo); +drm_private extern pthread_mutex_t table_lock; + +static void add_bucket(struct etna_bo_cache *cache, int size) +{ + unsigned i = cache->num_buckets; + + assert(i < ARRAY_SIZE(cache->cache_bucket)); + + list_inithead(&cache->cache_bucket[i].list); + cache->cache_bucket[i].size = size; + cache->num_buckets++; +} + +drm_private void etna_bo_cache_init(struct etna_bo_cache *cache) +{ + unsigned long size, cache_max_size = 64 * 1024 * 1024; + + /* OK, so power of two buckets was too wasteful of memory. + * Give 3 other sizes between each power of two, to hopefully + * cover things accurately enough. (The alternative is + * probably to just go for exact matching of sizes, and assume + * that for things like composited window resize the tiled + * width/height alignment and rounding of sizes to pages will + * get us useful cache hit rates anyway) + */ + add_bucket(cache, 4096); + add_bucket(cache, 4096 * 2); + add_bucket(cache, 4096 * 3); + + /* Initialize the linked lists for BO reuse cache. */ + for (size = 4 * 4096; size <= cache_max_size; size *= 2) { + add_bucket(cache, size); + add_bucket(cache, size + size * 1 / 4); + add_bucket(cache, size + size * 2 / 4); + add_bucket(cache, size + size * 3 / 4); + } +} + +/* Frees older cached buffers. Called under table_lock */ +drm_private void etna_bo_cache_cleanup(struct etna_bo_cache *cache, time_t time) +{ + unsigned i; + + if (cache->time == time) + return; + + for (i = 0; i < cache->num_buckets; i++) { + struct etna_bo_bucket *bucket = &cache->cache_bucket[i]; + struct etna_bo *bo; + + while (!LIST_IS_EMPTY(&bucket->list)) { + bo = LIST_ENTRY(struct etna_bo, bucket->list.next, list); + + /* keep things in cache for at least 1 second: */ + if (time && ((time - bo->free_time) <= 1)) + break; + + list_del(&bo->list); + bo_del(bo); + } + } + + cache->time = time; +} + +static struct etna_bo_bucket *get_bucket(struct etna_bo_cache *cache, uint32_t size) +{ + unsigned i; + + /* hmm, this is what intel does, but I suppose we could calculate our + * way to the correct bucket size rather than looping.. + */ + for (i = 0; i < cache->num_buckets; i++) { + struct etna_bo_bucket *bucket = &cache->cache_bucket[i]; + if (bucket->size >= size) { + return bucket; + } + } + + return NULL; +} + +static int is_idle(struct etna_bo *bo) +{ + return etna_bo_cpu_prep(bo, + DRM_ETNA_PREP_READ | + DRM_ETNA_PREP_WRITE | + DRM_ETNA_PREP_NOSYNC) == 0; +} + +static struct etna_bo *find_in_bucket(struct etna_bo_bucket *bucket, uint32_t flags) +{ + struct etna_bo *bo = NULL; + + pthread_mutex_lock(&table_lock); + while (!LIST_IS_EMPTY(&bucket->list)) { + bo = LIST_ENTRY(struct etna_bo, bucket->list.next, list); + + if (bo->flags == flags && is_idle(bo)) { + list_del(&bo->list); + break; + } + + bo = NULL; + break; + } + pthread_mutex_unlock(&table_lock); + + return bo; +} + +/* allocate a new (un-tiled) buffer object + * + * NOTE: size is potentially rounded up to bucket size + */ +drm_private struct etna_bo *etna_bo_cache_alloc(struct etna_bo_cache *cache, uint32_t *size, + uint32_t flags) +{ + struct etna_bo *bo; + struct etna_bo_bucket *bucket; + + *size = ALIGN(*size, 4096); + bucket = get_bucket(cache, *size); + + /* see if we can be green and recycle: */ + if (bucket) { + *size = bucket->size; + bo = find_in_bucket(bucket, flags); + if (bo) { + atomic_set(&bo->refcnt, 1); + etna_device_ref(bo->dev); + return bo; + } + } + + return NULL; +} + +drm_private int etna_bo_cache_free(struct etna_bo_cache *cache, struct etna_bo *bo) +{ + struct etna_bo_bucket *bucket = get_bucket(cache, bo->size); + + /* see if we can be green and recycle: */ + if (bucket) { + struct timespec time; + + clock_gettime(CLOCK_MONOTONIC, &time); + + bo->free_time = time.tv_sec; + list_addtail(&bo->list, &bucket->list); + etna_bo_cache_cleanup(cache, time.tv_sec); + + /* bo's in the bucket cache don't have a ref and + * don't hold a ref to the dev: + */ + etna_device_del_locked(bo->dev); + + return 0; + } + + return -1; +} diff --git a/etnaviv/etnaviv_cmd_stream.c b/etnaviv/etnaviv_cmd_stream.c new file mode 100644 index 0000000..9ce3f36 --- /dev/null +++ b/etnaviv/etnaviv_cmd_stream.c @@ -0,0 +1,243 @@ +/* + * Copyright (C) 2014-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifdef HAVE_CONFIG_H +# include <config.h> +#endif + +#include <assert.h> + +#include "etnaviv_drmif.h" +#include "etnaviv_priv.h" + +static pthread_mutex_t idx_lock = PTHREAD_MUTEX_INITIALIZER; + +static void *grow(void *ptr, uint32_t nr, uint32_t *max, uint32_t sz) +{ + if ((nr + 1) > *max) { + if ((*max * 2) < (nr + 1)) + *max = nr + 5; + else + *max = *max * 2; + ptr = realloc(ptr, *max * sz); + } + + return ptr; +} + +#define APPEND(x, name) ({ \ + (x)->name = grow((x)->name, (x)->nr_ ## name, &(x)->max_ ## name, sizeof((x)->name[0])); \ + (x)->nr_ ## name ++; \ +}) + +static inline struct etna_cmd_stream_priv * +etna_cmd_stream_priv(struct etna_cmd_stream *stream) +{ + return (struct etna_cmd_stream_priv *)stream; +} + +struct etna_cmd_stream *etna_cmd_stream_new(struct etna_pipe *pipe, uint32_t size, + void (*reset_notify)(struct etna_cmd_stream *stream, void *priv), + void *priv) +{ + struct etna_cmd_stream_priv *stream = NULL; + + if (size == 0) { + ERROR_MSG("invalid size of 0"); + goto fail; + } + + stream = calloc(1, sizeof(*stream)); + if (!stream) { + ERROR_MSG("allocation failed"); + goto fail; + } + + /* allocate even number of 32-bit words */ + size = ALIGN(size, 2); + + stream->base.buffer = malloc(size * sizeof(uint32_t)); + if (!stream->base.buffer) { + ERROR_MSG("allocation failed"); + goto fail; + } + + stream->base.size = size; + stream->pipe = pipe; + stream->reset_notify = reset_notify; + stream->reset_notify_priv = priv; + + return &stream->base; + +fail: + if (stream) + etna_cmd_stream_del(&stream->base); + + return NULL; +} + +void etna_cmd_stream_del(struct etna_cmd_stream *stream) +{ + struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream); + + free(stream->buffer); + free(priv->submit.relocs); + free(priv); +} + +static void reset_buffer(struct etna_cmd_stream *stream) +{ + struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream); + + stream->offset = 0; + priv->submit.nr_bos = 0; + priv->submit.nr_relocs = 0; + priv->nr_bos = 0; + + if (priv->reset_notify) + priv->reset_notify(stream, priv->reset_notify_priv); +} + +uint32_t etna_cmd_stream_timestamp(struct etna_cmd_stream *stream) +{ + return etna_cmd_stream_priv(stream)->last_timestamp; +} + +static uint32_t append_bo(struct etna_cmd_stream *stream, struct etna_bo *bo) +{ + struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream); + uint32_t idx; + + idx = APPEND(&priv->submit, bos); + idx = APPEND(priv, bos); + + priv->submit.bos[idx].flags = 0; + priv->submit.bos[idx].handle = bo->handle; + + priv->bos[idx] = etna_bo_ref(bo); + + return idx; +} + +/* add (if needed) bo, return idx: */ +static uint32_t bo2idx(struct etna_cmd_stream *stream, struct etna_bo *bo, + uint32_t flags) +{ + struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream); + uint32_t idx; + + pthread_mutex_lock(&idx_lock); + + if (!bo->current_stream) { + idx = append_bo(stream, bo); + bo->current_stream = stream; + bo->idx = idx; + } else if (bo->current_stream == stream) { + idx = bo->idx; + } else { + /* slow-path: */ + for (idx = 0; idx < priv->nr_bos; idx++) + if (priv->bos[idx] == bo) + break; + if (idx == priv->nr_bos) { + /* not found */ + idx = append_bo(stream, bo); + } + } + pthread_mutex_unlock(&idx_lock); + + if (flags & ETNA_RELOC_READ) + priv->submit.bos[idx].flags |= ETNA_SUBMIT_BO_READ; + if (flags & ETNA_RELOC_WRITE) + priv->submit.bos[idx].flags |= ETNA_SUBMIT_BO_WRITE; + + return idx; +} + +static void flush(struct etna_cmd_stream *stream) +{ + struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream); + int ret, id = priv->pipe->id; + struct etna_gpu *gpu = priv->pipe->gpu; + + struct drm_etnaviv_gem_submit req = { + .pipe = gpu->core, + .exec_state = id, + .bos = VOID2U64(priv->submit.bos), + .nr_bos = priv->submit.nr_bos, + .relocs = VOID2U64(priv->submit.relocs), + .nr_relocs = priv->submit.nr_relocs, + .stream = VOID2U64(stream->buffer), + .stream_size = stream->offset * 4, /* in bytes */ + }; + + ret = drmCommandWriteRead(gpu->dev->fd, DRM_ETNAVIV_GEM_SUBMIT, + &req, sizeof(req)); + + if (ret) + ERROR_MSG("submit failed: %d (%s)", ret, strerror(errno)); + else + priv->last_timestamp = req.fence; + + for (uint32_t i = 0; i < priv->nr_bos; i++) { + struct etna_bo *bo = priv->bos[i]; + + bo->current_stream = NULL; + etna_bo_del(bo); + } +} + +void etna_cmd_stream_flush(struct etna_cmd_stream *stream) +{ + flush(stream); + reset_buffer(stream); +} + +void etna_cmd_stream_finish(struct etna_cmd_stream *stream) +{ + struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream); + + flush(stream); + etna_pipe_wait(priv->pipe, priv->last_timestamp, 5000); + reset_buffer(stream); +} + +void etna_cmd_stream_reloc(struct etna_cmd_stream *stream, const struct etna_reloc *r) +{ + struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream); + struct drm_etnaviv_gem_submit_reloc *reloc; + uint32_t idx = APPEND(&priv->submit, relocs); + uint32_t addr = 0; + + reloc = &priv->submit.relocs[idx]; + + reloc->reloc_idx = bo2idx(stream, r->bo, r->flags); + reloc->reloc_offset = r->offset; + reloc->submit_offset = stream->offset * 4; /* in bytes */ + reloc->flags = 0; + + etna_cmd_stream_emit(stream, addr); +} diff --git a/etnaviv/etnaviv_device.c b/etnaviv/etnaviv_device.c new file mode 100644 index 0000000..f954ca4 --- /dev/null +++ b/etnaviv/etnaviv_device.c @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2014 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stdlib.h> +#include <linux/stddef.h> +#include <linux/types.h> +#include <errno.h> +#include <sys/mman.h> +#include <fcntl.h> +#include <unistd.h> +#include <pthread.h> + +#include <xf86drm.h> +#include <xf86atomic.h> + +#include "etnaviv_priv.h" +#include "etnaviv_drmif.h" + +static pthread_mutex_t table_lock = PTHREAD_MUTEX_INITIALIZER; + +struct etna_device *etna_device_new(int fd) +{ + struct etna_device *dev = calloc(sizeof(*dev), 1); + + if (!dev) + return NULL; + + atomic_set(&dev->refcnt, 1); + dev->fd = fd; + dev->handle_table = drmHashCreate(); + dev->name_table = drmHashCreate(); + etna_bo_cache_init(&dev->bo_cache); + + return dev; +} + +struct etna_device *etna_device_ref(struct etna_device *dev) +{ + atomic_inc(&dev->refcnt); + + return dev; +} + +static void etna_device_del_impl(struct etna_device *dev) +{ + etna_bo_cache_cleanup(&dev->bo_cache, 0); + drmHashDestroy(dev->handle_table); + drmHashDestroy(dev->name_table); + + free(dev); +} + +drm_private void etna_device_del_locked(struct etna_device *dev) +{ + if (!atomic_dec_and_test(&dev->refcnt)) + return; + + etna_device_del_impl(dev); +} + +void etna_device_del(struct etna_device *dev) +{ + if (!atomic_dec_and_test(&dev->refcnt)) + return; + + pthread_mutex_lock(&table_lock); + etna_device_del_impl(dev); + pthread_mutex_unlock(&table_lock); +} diff --git a/etnaviv/etnaviv_drm.h b/etnaviv/etnaviv_drm.h new file mode 100644 index 0000000..2584c1c --- /dev/null +++ b/etnaviv/etnaviv_drm.h @@ -0,0 +1,233 @@ +/* + * Copyright (C) 2015 Etnaviv Project + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __ETNAVIV_DRM_H__ +#define __ETNAVIV_DRM_H__ + +#include "drm.h" + +#if defined(__cplusplus) +extern "C" { +#endif + +/* Please note that modifications to all structs defined here are + * subject to backwards-compatibility constraints: + * 1) Do not use pointers, use __u64 instead for 32 bit / 64 bit + * user/kernel compatibility + * 2) Keep fields aligned to their size + * 3) Because of how drm_ioctl() works, we can add new fields at + * the end of an ioctl if some care is taken: drm_ioctl() will + * zero out the new fields at the tail of the ioctl, so a zero + * value should have a backwards compatible meaning. And for + * output params, userspace won't see the newly added output + * fields.. so that has to be somehow ok. + */ + +/* timeouts are specified in clock-monotonic absolute times (to simplify + * restarting interrupted ioctls). The following struct is logically the + * same as 'struct timespec' but 32/64b ABI safe. + */ +struct drm_etnaviv_timespec { + __s64 tv_sec; /* seconds */ + __s64 tv_nsec; /* nanoseconds */ +}; + +#define ETNAVIV_PARAM_GPU_MODEL 0x01 +#define ETNAVIV_PARAM_GPU_REVISION 0x02 +#define ETNAVIV_PARAM_GPU_FEATURES_0 0x03 +#define ETNAVIV_PARAM_GPU_FEATURES_1 0x04 +#define ETNAVIV_PARAM_GPU_FEATURES_2 0x05 +#define ETNAVIV_PARAM_GPU_FEATURES_3 0x06 +#define ETNAVIV_PARAM_GPU_FEATURES_4 0x07 +#define ETNAVIV_PARAM_GPU_FEATURES_5 0x08 +#define ETNAVIV_PARAM_GPU_FEATURES_6 0x09 + +#define ETNAVIV_PARAM_GPU_STREAM_COUNT 0x10 +#define ETNAVIV_PARAM_GPU_REGISTER_MAX 0x11 +#define ETNAVIV_PARAM_GPU_THREAD_COUNT 0x12 +#define ETNAVIV_PARAM_GPU_VERTEX_CACHE_SIZE 0x13 +#define ETNAVIV_PARAM_GPU_SHADER_CORE_COUNT 0x14 +#define ETNAVIV_PARAM_GPU_PIXEL_PIPES 0x15 +#define ETNAVIV_PARAM_GPU_VERTEX_OUTPUT_BUFFER_SIZE 0x16 +#define ETNAVIV_PARAM_GPU_BUFFER_SIZE 0x17 +#define ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT 0x18 +#define ETNAVIV_PARAM_GPU_NUM_CONSTANTS 0x19 +#define ETNAVIV_PARAM_GPU_NUM_VARYINGS 0x1a + +#define ETNA_MAX_PIPES 4 + +struct drm_etnaviv_param { + __u32 pipe; /* in */ + __u32 param; /* in, ETNAVIV_PARAM_x */ + __u64 value; /* out (get_param) or in (set_param) */ +}; + +/* + * GEM buffers: + */ + +#define ETNA_BO_CACHE_MASK 0x000f0000 +/* cache modes */ +#define ETNA_BO_CACHED 0x00010000 +#define ETNA_BO_WC 0x00020000 +#define ETNA_BO_UNCACHED 0x00040000 +/* map flags */ +#define ETNA_BO_FORCE_MMU 0x00100000 + +struct drm_etnaviv_gem_new { + __u64 size; /* in */ + __u32 flags; /* in, mask of ETNA_BO_x */ + __u32 handle; /* out */ +}; + +struct drm_etnaviv_gem_info { + __u32 handle; /* in */ + __u32 pad; + __u64 offset; /* out, offset to pass to mmap() */ +}; + +#define ETNA_PREP_READ 0x01 +#define ETNA_PREP_WRITE 0x02 +#define ETNA_PREP_NOSYNC 0x04 + +struct drm_etnaviv_gem_cpu_prep { + __u32 handle; /* in */ + __u32 op; /* in, mask of ETNA_PREP_x */ + struct drm_etnaviv_timespec timeout; /* in */ +}; + +struct drm_etnaviv_gem_cpu_fini { + __u32 handle; /* in */ + __u32 flags; /* in, placeholder for now, no defined values */ +}; + +/* + * Cmdstream Submission: + */ + +/* The value written into the cmdstream is logically: + * relocbuf->gpuaddr + reloc_offset + * + * NOTE that reloc's must be sorted by order of increasing submit_offset, + * otherwise EINVAL. + */ +struct drm_etnaviv_gem_submit_reloc { + __u32 submit_offset; /* in, offset from submit_bo */ + __u32 reloc_idx; /* in, index of reloc_bo buffer */ + __u64 reloc_offset; /* in, offset from start of reloc_bo */ + __u32 flags; /* in, placeholder for now, no defined values */ +}; + +/* Each buffer referenced elsewhere in the cmdstream submit (ie. the + * cmdstream buffer(s) themselves or reloc entries) has one (and only + * one) entry in the submit->bos[] table. + * + * As a optimization, the current buffer (gpu virtual address) can be + * passed back through the 'presumed' field. If on a subsequent reloc, + * userspace passes back a 'presumed' address that is still valid, + * then patching the cmdstream for this entry is skipped. This can + * avoid kernel needing to map/access the cmdstream bo in the common + * case. + */ +#define ETNA_SUBMIT_BO_READ 0x0001 +#define ETNA_SUBMIT_BO_WRITE 0x0002 +struct drm_etnaviv_gem_submit_bo { + __u32 flags; /* in, mask of ETNA_SUBMIT_BO_x */ + __u32 handle; /* in, GEM handle */ + __u64 presumed; /* in/out, presumed buffer address */ +}; + +/* Each cmdstream submit consists of a table of buffers involved, and + * one or more cmdstream buffers. This allows for conditional execution + * (context-restore), and IB buffers needed for per tile/bin draw cmds. + */ +#define ETNA_PIPE_3D 0x00 +#define ETNA_PIPE_2D 0x01 +#define ETNA_PIPE_VG 0x02 +struct drm_etnaviv_gem_submit { + __u32 fence; /* out */ + __u32 pipe; /* in */ + __u32 exec_state; /* in, initial execution state (ETNA_PIPE_x) */ + __u32 nr_bos; /* in, number of submit_bo's */ + __u32 nr_relocs; /* in, number of submit_reloc's */ + __u32 stream_size; /* in, cmdstream size */ + __u64 bos; /* in, ptr to array of submit_bo's */ + __u64 relocs; /* in, ptr to array of submit_reloc's */ + __u64 stream; /* in, ptr to cmdstream */ +}; + +/* The normal way to synchronize with the GPU is just to CPU_PREP on + * a buffer if you need to access it from the CPU (other cmdstream + * submission from same or other contexts, PAGE_FLIP ioctl, etc, all + * handle the required synchronization under the hood). This ioctl + * mainly just exists as a way to implement the gallium pipe_fence + * APIs without requiring a dummy bo to synchronize on. + */ +#define ETNA_WAIT_NONBLOCK 0x01 +struct drm_etnaviv_wait_fence { + __u32 pipe; /* in */ + __u32 fence; /* in */ + __u32 flags; /* in, mask of ETNA_WAIT_x */ + __u32 pad; + struct drm_etnaviv_timespec timeout; /* in */ +}; + +#define ETNA_USERPTR_READ 0x01 +#define ETNA_USERPTR_WRITE 0x02 +struct drm_etnaviv_gem_userptr { + __u64 user_ptr; /* in, page aligned user pointer */ + __u64 user_size; /* in, page aligned user size */ + __u32 flags; /* in, flags */ + __u32 handle; /* out, non-zero handle */ +}; + +struct drm_etnaviv_gem_wait { + __u32 pipe; /* in */ + __u32 handle; /* in, bo to be waited for */ + __u32 flags; /* in, mask of ETNA_WAIT_x */ + __u32 pad; + struct drm_etnaviv_timespec timeout; /* in */ +}; + +#define DRM_ETNAVIV_GET_PARAM 0x00 +/* placeholder: +#define DRM_ETNAVIV_SET_PARAM 0x01 + */ +#define DRM_ETNAVIV_GEM_NEW 0x02 +#define DRM_ETNAVIV_GEM_INFO 0x03 +#define DRM_ETNAVIV_GEM_CPU_PREP 0x04 +#define DRM_ETNAVIV_GEM_CPU_FINI 0x05 +#define DRM_ETNAVIV_GEM_SUBMIT 0x06 +#define DRM_ETNAVIV_WAIT_FENCE 0x07 +#define DRM_ETNAVIV_GEM_USERPTR 0x08 +#define DRM_ETNAVIV_GEM_WAIT 0x09 +#define DRM_ETNAVIV_NUM_IOCTLS 0x0a + +#define DRM_IOCTL_ETNAVIV_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GET_PARAM, struct drm_etnaviv_param) +#define DRM_IOCTL_ETNAVIV_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_NEW, struct drm_etnaviv_gem_new) +#define DRM_IOCTL_ETNAVIV_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_INFO, struct drm_etnaviv_gem_info) +#define DRM_IOCTL_ETNAVIV_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_PREP, struct drm_etnaviv_gem_cpu_prep) +#define DRM_IOCTL_ETNAVIV_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_FINI, struct drm_etnaviv_gem_cpu_fini) +#define DRM_IOCTL_ETNAVIV_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_SUBMIT, struct drm_etnaviv_gem_submit) +#define DRM_IOCTL_ETNAVIV_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_WAIT_FENCE, struct drm_etnaviv_wait_fence) +#define DRM_IOCTL_ETNAVIV_GEM_USERPTR DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_USERPTR, struct drm_etnaviv_gem_userptr) +#define DRM_IOCTL_ETNAVIV_GEM_WAIT DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_WAIT, struct drm_etnaviv_gem_wait) + +#if defined(__cplusplus) +} +#endif + +#endif /* __ETNAVIV_DRM_H__ */ diff --git a/etnaviv/etnaviv_drmif.h b/etnaviv/etnaviv_drmif.h new file mode 100644 index 0000000..979b16a --- /dev/null +++ b/etnaviv/etnaviv_drmif.h @@ -0,0 +1,188 @@ +/* + * Copyright (C) 2014-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifndef ETNAVIV_DRMIF_H_ +#define ETNAVIV_DRMIF_H_ + +#include <xf86drm.h> +#include <stdint.h> + +struct etna_bo; +struct etna_pipe; +struct etna_gpu; +struct etna_device; +struct etna_cmd_stream; + +enum etna_pipe_id { + ETNA_PIPE_3D = 0, + ETNA_PIPE_2D = 1, + ETNA_PIPE_VG = 2, + ETNA_PIPE_MAX +}; + +enum etna_param_id { + ETNA_GPU_MODEL = 0x1, + ETNA_GPU_REVISION = 0x2, + ETNA_GPU_FEATURES_0 = 0x3, + ETNA_GPU_FEATURES_1 = 0x4, + ETNA_GPU_FEATURES_2 = 0x5, + ETNA_GPU_FEATURES_3 = 0x6, + ETNA_GPU_FEATURES_4 = 0x7, + ETNA_GPU_FEATURES_5 = 0x8, + ETNA_GPU_FEATURES_6 = 0x9, + + ETNA_GPU_STREAM_COUNT = 0x10, + ETNA_GPU_REGISTER_MAX = 0x11, + ETNA_GPU_THREAD_COUNT = 0x12, + ETNA_GPU_VERTEX_CACHE_SIZE = 0x13, + ETNA_GPU_SHADER_CORE_COUNT = 0x14, + ETNA_GPU_PIXEL_PIPES = 0x15, + ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE = 0x16, + ETNA_GPU_BUFFER_SIZE = 0x17, + ETNA_GPU_INSTRUCTION_COUNT = 0x18, + ETNA_GPU_NUM_CONSTANTS = 0x19, + ETNA_GPU_NUM_VARYINGS = 0x1a +}; + +/* bo flags: */ +#define DRM_ETNA_GEM_CACHE_CACHED 0x00010000 +#define DRM_ETNA_GEM_CACHE_WC 0x00020000 +#define DRM_ETNA_GEM_CACHE_UNCACHED 0x00040000 +#define DRM_ETNA_GEM_CACHE_MASK 0x000f0000 +/* map flags */ +#define DRM_ETNA_GEM_FORCE_MMU 0x00100000 + +/* bo access flags: (keep aligned to ETNA_PREP_x) */ +#define DRM_ETNA_PREP_READ 0x01 +#define DRM_ETNA_PREP_WRITE 0x02 +#define DRM_ETNA_PREP_NOSYNC 0x04 + +/* device functions: + */ + +struct etna_device *etna_device_new(int fd); +struct etna_device *etna_device_ref(struct etna_device *dev); +void etna_device_del(struct etna_device *dev); + +/* gpu functions: + */ + +struct etna_gpu *etna_gpu_new(struct etna_device *dev, unsigned int core); +void etna_gpu_del(struct etna_gpu *gpu); +int etna_gpu_get_param(struct etna_gpu *gpu, enum etna_param_id param, + uint64_t *value); + + +/* pipe functions: + */ + +struct etna_pipe *etna_pipe_new(struct etna_gpu *gpu, enum etna_pipe_id id); +void etna_pipe_del(struct etna_pipe *pipe); +int etna_pipe_wait(struct etna_pipe *pipe, uint32_t timestamp, uint32_t ms); + + +/* buffer-object functions: + */ + +struct etna_bo *etna_bo_new(struct etna_device *dev, + uint32_t size, uint32_t flags); +struct etna_bo *etna_bo_from_handle(struct etna_device *dev, + uint32_t handle, uint32_t size); +struct etna_bo *etna_bo_from_name(struct etna_device *dev, uint32_t name); +struct etna_bo *etna_bo_from_dmabuf(struct etna_device *dev, int fd); +struct etna_bo *etna_bo_ref(struct etna_bo *bo); +void etna_bo_del(struct etna_bo *bo); +int etna_bo_get_name(struct etna_bo *bo, uint32_t *name); +uint32_t etna_bo_handle(struct etna_bo *bo); +int etna_bo_dmabuf(struct etna_bo *bo); +uint32_t etna_bo_size(struct etna_bo *bo); +void * etna_bo_map(struct etna_bo *bo); +int etna_bo_cpu_prep(struct etna_bo *bo, uint32_t op); +void etna_bo_cpu_fini(struct etna_bo *bo); + + +/* cmd stream functions: + */ + +struct etna_cmd_stream { + uint32_t *buffer; + uint32_t offset; /* in 32-bit words */ + uint32_t size; /* in 32-bit words */ +}; + +struct etna_cmd_stream *etna_cmd_stream_new(struct etna_pipe *pipe, uint32_t size, + void (*reset_notify)(struct etna_cmd_stream *stream, void *priv), + void *priv); +void etna_cmd_stream_del(struct etna_cmd_stream *stream); +uint32_t etna_cmd_stream_timestamp(struct etna_cmd_stream *stream); +void etna_cmd_stream_flush(struct etna_cmd_stream *stream); +void etna_cmd_stream_finish(struct etna_cmd_stream *stream); + +static inline uint32_t etna_cmd_stream_avail(struct etna_cmd_stream *stream) +{ + static const uint32_t END_CLEARANCE = 2; /* LINK op code */ + + return stream->size - stream->offset - END_CLEARANCE; +} + +static inline void etna_cmd_stream_reserve(struct etna_cmd_stream *stream, size_t n) +{ + if (etna_cmd_stream_avail(stream) < n) + etna_cmd_stream_flush(stream); +} + +static inline void etna_cmd_stream_emit(struct etna_cmd_stream *stream, uint32_t data) +{ + stream->buffer[stream->offset++] = data; +} + +static inline uint32_t etna_cmd_stream_get(struct etna_cmd_stream *stream, uint32_t offset) +{ + return stream->buffer[offset]; +} + +static inline void etna_cmd_stream_set(struct etna_cmd_stream *stream, uint32_t offset, + uint32_t data) +{ + stream->buffer[offset] = data; +} + +static inline uint32_t etna_cmd_stream_offset(struct etna_cmd_stream *stream) +{ + return stream->offset; +} + +struct etna_reloc { + struct etna_bo *bo; +#define ETNA_RELOC_READ 0x0001 +#define ETNA_RELOC_WRITE 0x0002 + uint32_t flags; + uint32_t offset; +}; + +void etna_cmd_stream_reloc(struct etna_cmd_stream *stream, const struct etna_reloc *r); + +#endif /* ETNAVIV_DRMIF_H_ */ diff --git a/etnaviv/etnaviv_gpu.c b/etnaviv/etnaviv_gpu.c new file mode 100644 index 0000000..35dec6c --- /dev/null +++ b/etnaviv/etnaviv_gpu.c @@ -0,0 +1,175 @@ +/* + * Copyright (C) 2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifdef HAVE_CONFIG_H +# include <config.h> +#endif + +#include "etnaviv_priv.h" +#include "etnaviv_drmif.h" + +static uint64_t get_param(struct etna_device *dev, uint32_t core, uint32_t param) +{ + struct drm_etnaviv_param req = { + .pipe = core, + .param = param, + }; + int ret; + + ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_GET_PARAM, &req, sizeof(req)); + if (ret) { + ERROR_MSG("get-param (%x) failed! %d (%s)", param, ret, strerror(errno)); + return 0; + } + + return req.value; +} + +struct etna_gpu *etna_gpu_new(struct etna_device *dev, unsigned int core) +{ + struct etna_gpu *gpu; + + gpu = calloc(1, sizeof(*gpu)); + if (!gpu) { + ERROR_MSG("allocation failed"); + goto fail; + } + + gpu->dev = dev; + gpu->core = core; + + /* get specs from kernel space */ + gpu->specs.model = get_param(dev, core, ETNAVIV_PARAM_GPU_MODEL); + gpu->specs.revision = get_param(dev, core, ETNAVIV_PARAM_GPU_REVISION); + gpu->specs.features[0] = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_0); + gpu->specs.features[1] = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_1); + gpu->specs.features[2] = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_2); + gpu->specs.features[3] = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_3); + gpu->specs.features[4] = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_4); + gpu->specs.features[5] = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_5); + gpu->specs.features[6] = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_6); + gpu->specs.stream_count = get_param(dev, core, ETNA_GPU_STREAM_COUNT); + gpu->specs.register_max = get_param(dev, core, ETNA_GPU_REGISTER_MAX); + gpu->specs.thread_count = get_param(dev, core, ETNA_GPU_THREAD_COUNT); + gpu->specs.vertex_cache_size = get_param(dev, core, ETNA_GPU_VERTEX_CACHE_SIZE); + gpu->specs.shader_core_count = get_param(dev, core, ETNA_GPU_SHADER_CORE_COUNT); + gpu->specs.pixel_pipes = get_param(dev, core, ETNA_GPU_PIXEL_PIPES); + gpu->specs.vertex_output_buffer_size = get_param(dev, core, ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE); + gpu->specs.buffer_size = get_param(dev, core, ETNA_GPU_BUFFER_SIZE); + gpu->specs.instruction_count = get_param(dev, core, ETNA_GPU_INSTRUCTION_COUNT); + gpu->specs.num_constants = get_param(dev, core, ETNA_GPU_NUM_CONSTANTS); + gpu->specs.num_varyings = get_param(dev, core, ETNA_GPU_NUM_VARYINGS); + + if (!gpu->specs.model) + goto fail; + + INFO_MSG(" GPU model: 0x%x (rev %x)", gpu->specs.model, gpu->specs.revision); + + return gpu; +fail: + if (gpu) + etna_gpu_del(gpu); + + return NULL; +} + +void etna_gpu_del(struct etna_gpu *gpu) +{ + free(gpu); +} + +int etna_gpu_get_param(struct etna_gpu *gpu, enum etna_param_id param, + uint64_t *value) +{ + switch(param) { + case ETNA_GPU_MODEL: + *value = gpu->specs.model; + return 0; + case ETNA_GPU_REVISION: + *value = gpu->specs.revision; + return 0; + case ETNA_GPU_FEATURES_0: + *value = gpu->specs.features[0]; + return 0; + case ETNA_GPU_FEATURES_1: + *value = gpu->specs.features[1]; + return 0; + case ETNA_GPU_FEATURES_2: + *value = gpu->specs.features[2]; + return 0; + case ETNA_GPU_FEATURES_3: + *value = gpu->specs.features[3]; + return 0; + case ETNA_GPU_FEATURES_4: + *value = gpu->specs.features[4]; + return 0; + case ETNA_GPU_FEATURES_5: + *value = gpu->specs.features[5]; + return 0; + case ETNA_GPU_FEATURES_6: + *value = gpu->specs.features[6]; + return 0; + case ETNA_GPU_STREAM_COUNT: + *value = gpu->specs.stream_count; + return 0; + case ETNA_GPU_REGISTER_MAX: + *value = gpu->specs.register_max; + return 0; + case ETNA_GPU_THREAD_COUNT: + *value = gpu->specs.thread_count; + return 0; + case ETNA_GPU_VERTEX_CACHE_SIZE: + *value = gpu->specs.vertex_cache_size; + return 0; + case ETNA_GPU_SHADER_CORE_COUNT: + *value = gpu->specs.shader_core_count; + return 0; + case ETNA_GPU_PIXEL_PIPES: + *value = gpu->specs.pixel_pipes; + return 0; + case ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE: + *value = gpu->specs.vertex_output_buffer_size; + return 0; + case ETNA_GPU_BUFFER_SIZE: + *value = gpu->specs.buffer_size; + return 0; + case ETNA_GPU_INSTRUCTION_COUNT: + *value = gpu->specs.instruction_count; + return 0; + case ETNA_GPU_NUM_CONSTANTS: + *value = gpu->specs.num_constants; + return 0; + case ETNA_GPU_NUM_VARYINGS: + *value = gpu->specs.num_varyings; + return 0; + + default: + ERROR_MSG("invalid param id: %d", param); + return -1; + } + + return 0; +} diff --git a/etnaviv/etnaviv_pipe.c b/etnaviv/etnaviv_pipe.c new file mode 100644 index 0000000..402b71d --- /dev/null +++ b/etnaviv/etnaviv_pipe.c @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2014-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifdef HAVE_CONFIG_H +# include <config.h> +#endif + +#include "etnaviv_priv.h" + +int etna_pipe_wait(struct etna_pipe *pipe, uint32_t timestamp, uint32_t ms) +{ + struct etna_device *dev = pipe->gpu->dev; + int ret; + + struct drm_etnaviv_wait_fence req = { + .pipe = pipe->gpu->core, + .fence = timestamp, + }; + + if (ms == 0) + req.flags |= ETNA_WAIT_NONBLOCK; + + get_abs_timeout(&req.timeout, ms); + + ret = drmCommandWrite(dev->fd, DRM_ETNAVIV_WAIT_FENCE, &req, sizeof(req)); + if (ret) { + ERROR_MSG("wait-fence failed! %d (%s)", ret, strerror(errno)); + return ret; + } + + return 0; +} + +void etna_pipe_del(struct etna_pipe *pipe) +{ + free(pipe); +} + +struct etna_pipe *etna_pipe_new(struct etna_gpu *gpu, enum etna_pipe_id id) +{ + struct etna_pipe *pipe; + + pipe = calloc(1, sizeof(*pipe)); + if (!pipe) { + ERROR_MSG("allocation failed"); + goto fail; + } + + pipe->id = id; + pipe->gpu = gpu; + + return pipe; +fail: + return NULL; +} diff --git a/etnaviv/etnaviv_priv.h b/etnaviv/etnaviv_priv.h new file mode 100644 index 0000000..6bb0c8d --- /dev/null +++ b/etnaviv/etnaviv_priv.h @@ -0,0 +1,199 @@ +/* + * Copyright (C) 2014-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner <[email protected]> + */ + +#ifndef ETNAVIV_PRIV_H_ +#define ETNAVIV_PRIV_H_ + +#include <stdlib.h> +#include <errno.h> +#include <string.h> +#include <unistd.h> +#include <errno.h> +#include <fcntl.h> +#include <sys/ioctl.h> +#include <pthread.h> +#include <stdio.h> +#include <assert.h> + +#include "libdrm_macros.h" +#include "xf86drm.h" +#include "xf86atomic.h" + +#include "util_double_list.h" + +#include "etnaviv_drmif.h" +#include "etnaviv_drm.h" + +#define VIV_FEATURES_WORD_COUNT 7 + +struct etna_specs { + uint32_t model; + uint32_t revision; + uint32_t features[VIV_FEATURES_WORD_COUNT]; + uint32_t stream_count; + uint32_t register_max; + uint32_t thread_count; + uint32_t shader_core_count; + uint32_t vertex_cache_size; + uint32_t vertex_output_buffer_size; + uint32_t pixel_pipes; + uint32_t instruction_count; + uint32_t num_constants; + uint32_t num_varyings; + uint32_t buffer_size; +}; + +struct etna_bo_bucket { + uint32_t size; + struct list_head list; +}; + +struct etna_bo_cache { + struct etna_bo_bucket cache_bucket[14 * 4]; + unsigned num_buckets; + time_t time; +}; + +struct etna_device { + int fd; + atomic_t refcnt; + + /* tables to keep track of bo's, to avoid "evil-twin" etna_bo objects: + * + * handle_table: maps handle to etna_bo + * name_table: maps flink name to etna_bo + * + * We end up needing two tables, because DRM_IOCTL_GEM_OPEN always + * returns a new handle. So we need to figure out if the bo is already + * open in the process first, before calling gem-open. + */ + void *handle_table, *name_table; + + struct etna_bo_cache bo_cache; +}; + +drm_private void etna_bo_cache_init(struct etna_bo_cache *cache); +drm_private void etna_bo_cache_cleanup(struct etna_bo_cache *cache, time_t time); +drm_private struct etna_bo *etna_bo_cache_alloc(struct etna_bo_cache *cache, + uint32_t *size, uint32_t flags); +drm_private int etna_bo_cache_free(struct etna_bo_cache *cache, struct etna_bo *bo); + +/* for where @table_lock is already held: */ +drm_private void etna_device_del_locked(struct etna_device *dev); + +/* a GEM buffer object allocated from the DRM device */ +struct etna_bo { + struct etna_device *dev; + void *map; /* userspace mmap'ing (if there is one) */ + uint32_t size; + uint32_t handle; + uint32_t flags; + uint32_t name; /* flink global handle (DRI2 name) */ + uint64_t offset; /* offset to mmap() */ + atomic_t refcnt; + + /* in the common case, a bo won't be referenced by more than a single + * command stream. So to avoid looping over all the bo's in the + * reloc table to find the idx of a bo that might already be in the + * table, we cache the idx in the bo. But in order to detect the + * slow-path where bo is ref'd in multiple streams, we also must track + * the current_stream for which the idx is valid. See bo2idx(). + */ + struct etna_cmd_stream *current_stream; + uint32_t idx; + + int reuse; + struct list_head list; /* bucket-list entry */ + time_t free_time; /* time when added to bucket-list */ +}; + +struct etna_gpu { + struct etna_device *dev; + struct etna_specs specs; + uint32_t core; +}; + +struct etna_pipe { + enum etna_pipe_id id; + struct etna_gpu *gpu; +}; + +struct etna_cmd_stream_priv { + struct etna_cmd_stream base; + struct etna_pipe *pipe; + + uint32_t last_timestamp; + + /* submit ioctl related tables: */ + struct { + /* bo's table: */ + struct drm_etnaviv_gem_submit_bo *bos; + uint32_t nr_bos, max_bos; + + /* reloc's table: */ + struct drm_etnaviv_gem_submit_reloc *relocs; + uint32_t nr_relocs, max_relocs; + } submit; + + /* should have matching entries in submit.bos: */ + struct etna_bo **bos; + uint32_t nr_bos, max_bos; + + /* notify callback if buffer reset happend */ + void (*reset_notify)(struct etna_cmd_stream *stream, void *priv); + void *reset_notify_priv; +}; + +#define ALIGN(v,a) (((v) + (a) - 1) & ~((a) - 1)) +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) + +#define enable_debug 1 /* TODO make dynamic */ + +#define INFO_MSG(fmt, ...) \ + do { drmMsg("[I] "fmt " (%s:%d)\n", \ + ##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0) +#define DEBUG_MSG(fmt, ...) \ + do if (enable_debug) { drmMsg("[D] "fmt " (%s:%d)\n", \ + ##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0) +#define WARN_MSG(fmt, ...) \ + do { drmMsg("[W] "fmt " (%s:%d)\n", \ + ##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0) +#define ERROR_MSG(fmt, ...) \ + do { drmMsg("[E] " fmt " (%s:%d)\n", \ + ##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0) + +#define VOID2U64(x) ((uint64_t)(unsigned long)(x)) + +static inline void get_abs_timeout(struct drm_etnaviv_timespec *tv, uint32_t ms) +{ + struct timespec t; + uint32_t s = ms / 1000; + clock_gettime(CLOCK_MONOTONIC, &t); + tv->tv_sec = t.tv_sec + s; + tv->tv_nsec = t.tv_nsec + ((ms - (s * 1000)) * 1000000); +} + +#endif /* ETNAVIV_PRIV_H_ */ diff --git a/etnaviv/libdrm_etnaviv.pc.in b/etnaviv/libdrm_etnaviv.pc.in new file mode 100644 index 0000000..13fed01 --- /dev/null +++ b/etnaviv/libdrm_etnaviv.pc.in @@ -0,0 +1,11 @@ +prefix=@prefix@ +exec_prefix=@exec_prefix@ +libdir=@libdir@ +includedir=@includedir@ + +Name: libdrm_etnaviv +Description: Userspace interface to etnaviv kernel DRM services +Version: @PACKAGE_VERSION@ +Libs: -L${libdir} -ldrm_etnaviv +Cflags: -I${includedir} -I${includedir}/libdrm +Requires.private: libdrm ------------------------------------------------------------------------------ --