drm: Branch 'master' - 5 commits
[email protected] (Leo Liu) Mon, 5 Jun 2017 14:51:47 +0000 (UTC)
| Newsgroups | gmane.comp.video.dri.patches |
|---|---|
| Message-ID | <[email protected]> |
tests/amdgpu/Makefile.am | 3 tests/amdgpu/amdgpu_test.c | 6 tests/amdgpu/amdgpu_test.h | 15 + tests/amdgpu/cs_tests.c | 7 tests/amdgpu/decode_messages.h | 43 +++- tests/amdgpu/vcn_tests.c | 410 +++++++++++++++++++++++++++++++++++++++++ 6 files changed, 476 insertions(+), 8 deletions(-) New commits: commit 16444e1061a2dcc80cdc80d64b6ae9ef2deee5fe Author: Leo Liu <[email protected]> Date: Mon Apr 3 15:58:31 2017 -0400 tests/amdgpu: implement vcn dec unit tests Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]> diff --git a/tests/amdgpu/decode_messages.h b/tests/amdgpu/decode_messages.h index c5c96f80..bd6fe4b6 100644 --- a/tests/amdgpu/decode_messages.h +++ b/tests/amdgpu/decode_messages.h @@ -815,4 +815,34 @@ static const uint8_t uvd_it_scaling_table[] = { 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10, }; +static const uint8_t vcn_dec_create_msg[] = { + 0x28,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x03,0x00,0x44,0x40,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x28,0x00,0x00,0x00, + 0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x60,0x03,0x00,0x00,0xe0,0x01,0x00,0x00, +}; + +static const uint8_t vcn_dec_decode_msg[] = { + 0x28,0x00,0x00,0x00,0x90,0x06,0x00,0x00,0x02,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x03,0x00,0x44,0x40,0x01,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x38,0x00,0x00,0x00, + 0xb4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x00,0x00,0xec,0x00,0x00,0x00, + 0x5c,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x01,0x00,0x00,0x00, + 0x60,0x03,0x00,0x00,0xe0,0x01,0x00,0x00,0x80,0x05,0x00,0x00,0x00,0x94,0x6b,0x00, + 0x96,0x4e,0x0b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x50,0x00, + 0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00, + 0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0xc0,0x03,0x00,0x00,0x80,0x07,0x00,0x00,0x60,0x09,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +}; + +static const uint8_t vcn_dec_destroy_msg[] = { + 0x28,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00, + 0x03,0x00,0x44,0x40,0x00,0x00,0x00,0x00, +}; + #endif /* _DECODE_MESSAGES_H_ */ diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c index 0d3991a8..2b1696dd 100644 --- a/tests/amdgpu/vcn_tests.c +++ b/tests/amdgpu/vcn_tests.c @@ -35,6 +35,7 @@ #include "amdgpu_test.h" #include "amdgpu_drm.h" #include "amdgpu_internal.h" +#include "decode_messages.h" #define IB_SIZE 4096 #define MAX_RESOURCES 16 @@ -228,28 +229,160 @@ static void free_resource(struct amdgpu_vcn_bo *vcn_bo) memset(vcn_bo, 0, sizeof(*vcn_bo)); } +static void vcn_dec_cmd(uint64_t addr, unsigned cmd, int *idx) +{ + ib_cpu[(*idx)++] = 0x81C4; + ib_cpu[(*idx)++] = addr; + ib_cpu[(*idx)++] = 0x81C5; + ib_cpu[(*idx)++] = addr >> 32; + ib_cpu[(*idx)++] = 0x81C3; + ib_cpu[(*idx)++] = cmd << 1; +} + static void amdgpu_cs_vcn_dec_create(void) { + struct amdgpu_vcn_bo msg_buf; + int len, r; + if (family_id < AMDGPU_FAMILY_RV) return; - /* TODO */ + num_resources = 0; + alloc_resource(&msg_buf, 4096, AMDGPU_GEM_DOMAIN_GTT); + resources[num_resources++] = msg_buf.handle; + resources[num_resources++] = ib_handle; + + r = amdgpu_bo_cpu_map(msg_buf.handle, (void **)&msg_buf.ptr); + CU_ASSERT_EQUAL(r, 0); + + memset(msg_buf.ptr, 0, 4096); + memcpy(msg_buf.ptr, vcn_dec_create_msg, sizeof(vcn_dec_create_msg)); + + len = 0; + ib_cpu[len++] = 0x81C4; + ib_cpu[len++] = msg_buf.addr; + ib_cpu[len++] = 0x81C5; + ib_cpu[len++] = msg_buf.addr >> 32; + ib_cpu[len++] = 0x81C3; + ib_cpu[len++] = 0; + for (; len % 16; ++len) + ib_cpu[len] = 0x81ff; + + r = submit(len, AMDGPU_HW_IP_VCN_DEC); + CU_ASSERT_EQUAL(r, 0); + + free_resource(&msg_buf); } static void amdgpu_cs_vcn_dec_decode(void) { + const unsigned dpb_size = 15923584, ctx_size = 5287680, dt_size = 737280; + uint64_t msg_addr, fb_addr, bs_addr, dpb_addr, ctx_addr, dt_addr, it_addr, sum; + struct amdgpu_vcn_bo dec_buf; + int size, len, i, r; + uint8_t *dec; + if (family_id < AMDGPU_FAMILY_RV) return; - /* TODO */ + size = 4*1024; /* msg */ + size += 4*1024; /* fb */ + size += 4096; /*it_scaling_table*/ + size += ALIGN(sizeof(uvd_bitstream), 4*1024); + size += ALIGN(dpb_size, 4*1024); + size += ALIGN(dt_size, 4*1024); + + num_resources = 0; + alloc_resource(&dec_buf, size, AMDGPU_GEM_DOMAIN_GTT); + resources[num_resources++] = dec_buf.handle; + resources[num_resources++] = ib_handle; + + r = amdgpu_bo_cpu_map(dec_buf.handle, (void **)&dec_buf.ptr); + dec = dec_buf.ptr; + + CU_ASSERT_EQUAL(r, 0); + memset(dec_buf.ptr, 0, size); + memcpy(dec_buf.ptr, vcn_dec_decode_msg, sizeof(vcn_dec_decode_msg)); + memcpy(dec_buf.ptr + sizeof(vcn_dec_decode_msg), + avc_decode_msg, sizeof(avc_decode_msg)); + + dec += 4*1024; + dec += 4*1024; + memcpy(dec, uvd_it_scaling_table, sizeof(uvd_it_scaling_table)); + + dec += 4*1024; + memcpy(dec, uvd_bitstream, sizeof(uvd_bitstream)); + + dec += ALIGN(sizeof(uvd_bitstream), 4*1024); + + dec += ALIGN(dpb_size, 4*1024); + + msg_addr = dec_buf.addr; + fb_addr = msg_addr + 4*1024; + it_addr = fb_addr + 4*1024; + bs_addr = it_addr + 4*1024; + dpb_addr = ALIGN(bs_addr + sizeof(uvd_bitstream), 4*1024); + ctx_addr = ALIGN(dpb_addr + 0x006B9400, 4*1024); + dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024); + + len = 0; + vcn_dec_cmd(msg_addr, 0x0, &len); + vcn_dec_cmd(dpb_addr, 0x1, &len); + vcn_dec_cmd(dt_addr, 0x2, &len); + vcn_dec_cmd(fb_addr, 0x3, &len); + vcn_dec_cmd(bs_addr, 0x100, &len); + vcn_dec_cmd(it_addr, 0x204, &len); + vcn_dec_cmd(ctx_addr, 0x206, &len); + + ib_cpu[len++] = 0x81C6; + ib_cpu[len++] = 0x1; + for (; len % 16; ++len) + ib_cpu[len] = 0x80000000; + + r = submit(len, AMDGPU_HW_IP_VCN_DEC); + CU_ASSERT_EQUAL(r, 0); + + for (i = 0, sum = 0; i < dt_size; ++i) + sum += dec[i]; + + CU_ASSERT_EQUAL(sum, SUM_DECODE); + + free_resource(&dec_buf); } static void amdgpu_cs_vcn_dec_destroy(void) { + struct amdgpu_vcn_bo msg_buf; + int len, r; + if (family_id < AMDGPU_FAMILY_RV) return; - /* TODO */ + num_resources = 0; + alloc_resource(&msg_buf, 1024, AMDGPU_GEM_DOMAIN_GTT); + resources[num_resources++] = msg_buf.handle; + resources[num_resources++] = ib_handle; + + r = amdgpu_bo_cpu_map(msg_buf.handle, (void **)&msg_buf.ptr); + CU_ASSERT_EQUAL(r, 0); + + memset(msg_buf.ptr, 0, 1024); + memcpy(msg_buf.ptr, vcn_dec_destroy_msg, sizeof(vcn_dec_destroy_msg)); + + len = 0; + ib_cpu[len++] = 0x81C4; + ib_cpu[len++] = msg_buf.addr; + ib_cpu[len++] = 0x81C5; + ib_cpu[len++] = msg_buf.addr >> 32; + ib_cpu[len++] = 0x81C3; + ib_cpu[len++] = 0; + for (; len % 16; ++len) + ib_cpu[len] = 0x80000000; + + r = submit(len, AMDGPU_HW_IP_VCN_DEC); + CU_ASSERT_EQUAL(r, 0); + + free_resource(&msg_buf); } static void amdgpu_cs_vcn_enc_create(void) commit c1f5eea50ff5d4c1a76bb16cbda5530a7bb8e8d1 Author: Leo Liu <[email protected]> Date: Mon Apr 3 15:52:31 2017 -0400 tests/amdgpu: add vcn tests support and sets Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]> diff --git a/tests/amdgpu/Makefile.am b/tests/amdgpu/Makefile.am index c1c3a32e..d4572bec 100644 --- a/tests/amdgpu/Makefile.am +++ b/tests/amdgpu/Makefile.am @@ -26,4 +26,5 @@ amdgpu_test_SOURCES = \ uvd_messages.h \ vce_tests.c \ vce_ib.h \ - frame.h + frame.h \ + vcn_tests.c diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c index 3fd6820a..bc901a9e 100644 --- a/tests/amdgpu/amdgpu_test.c +++ b/tests/amdgpu/amdgpu_test.c @@ -85,6 +85,12 @@ static CU_SuiteInfo suites[] = { .pCleanupFunc = suite_vce_tests_clean, .pTests = vce_tests, }, + { + .pName = "VCN Tests", + .pInitFunc = suite_vcn_tests_init, + .pCleanupFunc = suite_vcn_tests_clean, + .pTests = vcn_tests, + }, CU_SUITE_INFO_NULL, }; diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h index e30e2312..c75a07a4 100644 --- a/tests/amdgpu/amdgpu_test.h +++ b/tests/amdgpu/amdgpu_test.h @@ -105,6 +105,21 @@ int suite_vce_tests_clean(); extern CU_TestInfo vce_tests[]; /** ++ * Initialize vcn test suite ++ */ +int suite_vcn_tests_init(); + +/** ++ * Deinitialize vcn test suite ++ */ +int suite_vcn_tests_clean(); + +/** ++ * Tests in vcn test suite ++ */ +extern CU_TestInfo vcn_tests[]; + +/** * Helper functions */ static inline amdgpu_bo_handle gpu_mem_alloc( diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c new file mode 100644 index 00000000..0d3991a8 --- /dev/null +++ b/tests/amdgpu/vcn_tests.c @@ -0,0 +1,277 @@ +/* + * Copyright 2017 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * +*/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stdio.h> +#include <inttypes.h> + +#include "CUnit/Basic.h" + +#include "util_math.h" + +#include "amdgpu_test.h" +#include "amdgpu_drm.h" +#include "amdgpu_internal.h" + +#define IB_SIZE 4096 +#define MAX_RESOURCES 16 + +struct amdgpu_vcn_bo { + amdgpu_bo_handle handle; + amdgpu_va_handle va_handle; + uint64_t addr; + uint64_t size; + uint8_t *ptr; +}; + +static amdgpu_device_handle device_handle; +static uint32_t major_version; +static uint32_t minor_version; +static uint32_t family_id; + +static amdgpu_context_handle context_handle; +static amdgpu_bo_handle ib_handle; +static amdgpu_va_handle ib_va_handle; +static uint64_t ib_mc_address; +static uint32_t *ib_cpu; + +static amdgpu_bo_handle resources[MAX_RESOURCES]; +static unsigned num_resources; + +static void amdgpu_cs_vcn_dec_create(void); +static void amdgpu_cs_vcn_dec_decode(void); +static void amdgpu_cs_vcn_dec_destroy(void); + +static void amdgpu_cs_vcn_enc_create(void); +static void amdgpu_cs_vcn_enc_encode(void); +static void amdgpu_cs_vcn_enc_destroy(void); + +CU_TestInfo vcn_tests[] = { + + { "VCN DEC create", amdgpu_cs_vcn_dec_create }, + { "VCN DEC decode", amdgpu_cs_vcn_dec_decode }, + { "VCN DEC destroy", amdgpu_cs_vcn_dec_destroy }, + + { "VCN ENC create", amdgpu_cs_vcn_enc_create }, + { "VCN ENC decode", amdgpu_cs_vcn_enc_encode }, + { "VCN ENC destroy", amdgpu_cs_vcn_enc_destroy }, + CU_TEST_INFO_NULL, +}; + +int suite_vcn_tests_init(void) +{ + int r; + + r = amdgpu_device_initialize(drm_amdgpu[0], &major_version, + &minor_version, &device_handle); + if (r) + return CUE_SINIT_FAILED; + + family_id = device_handle->info.family_id; + + if (family_id < AMDGPU_FAMILY_RV) { + printf("\n\nThe ASIC NOT support VCN, all sub-tests will pass\n"); + return CUE_SUCCESS; + } + + r = amdgpu_cs_ctx_create(device_handle, &context_handle); + if (r) + return CUE_SINIT_FAILED; + + r = amdgpu_bo_alloc_and_map(device_handle, IB_SIZE, 4096, + AMDGPU_GEM_DOMAIN_GTT, 0, + &ib_handle, (void**)&ib_cpu, + &ib_mc_address, &ib_va_handle); + if (r) + return CUE_SINIT_FAILED; + + return CUE_SUCCESS; +} + +int suite_vcn_tests_clean(void) +{ + int r; + + if (family_id < AMDGPU_FAMILY_RV) { + r = amdgpu_device_deinitialize(device_handle); + if (r) + return CUE_SCLEAN_FAILED; + } else { + r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle, + ib_mc_address, IB_SIZE); + if (r) + return CUE_SCLEAN_FAILED; + + r = amdgpu_cs_ctx_free(context_handle); + if (r) + return CUE_SCLEAN_FAILED; + + r = amdgpu_device_deinitialize(device_handle); + if (r) + return CUE_SCLEAN_FAILED; + } + + return CUE_SUCCESS; +} + +static int submit(unsigned ndw, unsigned ip) +{ + struct amdgpu_cs_request ibs_request = {0}; + struct amdgpu_cs_ib_info ib_info = {0}; + struct amdgpu_cs_fence fence_status = {0}; + uint32_t expired; + int r; + + ib_info.ib_mc_address = ib_mc_address; + ib_info.size = ndw; + + ibs_request.ip_type = ip; + + r = amdgpu_bo_list_create(device_handle, num_resources, resources, + NULL, &ibs_request.resources); + if (r) + return r; + + ibs_request.number_of_ibs = 1; + ibs_request.ibs = &ib_info; + ibs_request.fence_info.handle = NULL; + + r = amdgpu_cs_submit(context_handle, 0, &ibs_request, 1); + if (r) + return r; + + r = amdgpu_bo_list_destroy(ibs_request.resources); + if (r) + return r; + + fence_status.context = context_handle; + fence_status.ip_type = ip; + fence_status.fence = ibs_request.seq_no; + + r = amdgpu_cs_query_fence_status(&fence_status, + AMDGPU_TIMEOUT_INFINITE, + 0, &expired); + if (r) + return r; + + return 0; +} + +static void alloc_resource(struct amdgpu_vcn_bo *vcn_bo, + unsigned size, unsigned domain) +{ + struct amdgpu_bo_alloc_request req = {0}; + amdgpu_bo_handle buf_handle; + amdgpu_va_handle va_handle; + uint64_t va = 0; + int r; + + req.alloc_size = ALIGN(size, 4096); + req.preferred_heap = domain; + r = amdgpu_bo_alloc(device_handle, &req, &buf_handle); + CU_ASSERT_EQUAL(r, 0); + r = amdgpu_va_range_alloc(device_handle, + amdgpu_gpu_va_range_general, + req.alloc_size, 1, 0, &va, + &va_handle, 0); + CU_ASSERT_EQUAL(r, 0); + r = amdgpu_bo_va_op(buf_handle, 0, req.alloc_size, va, 0, + AMDGPU_VA_OP_MAP); + CU_ASSERT_EQUAL(r, 0); + vcn_bo->addr = va; + vcn_bo->handle = buf_handle; + vcn_bo->size = req.alloc_size; + vcn_bo->va_handle = va_handle; + r = amdgpu_bo_cpu_map(vcn_bo->handle, (void **)&vcn_bo->ptr); + CU_ASSERT_EQUAL(r, 0); + memset(vcn_bo->ptr, 0, size); + r = amdgpu_bo_cpu_unmap(vcn_bo->handle); + CU_ASSERT_EQUAL(r, 0); +} + +static void free_resource(struct amdgpu_vcn_bo *vcn_bo) +{ + int r; + + r = amdgpu_bo_va_op(vcn_bo->handle, 0, vcn_bo->size, + vcn_bo->addr, 0, AMDGPU_VA_OP_UNMAP); + CU_ASSERT_EQUAL(r, 0); + + r = amdgpu_va_range_free(vcn_bo->va_handle); + CU_ASSERT_EQUAL(r, 0); + + r = amdgpu_bo_free(vcn_bo->handle); + CU_ASSERT_EQUAL(r, 0); + memset(vcn_bo, 0, sizeof(*vcn_bo)); +} + +static void amdgpu_cs_vcn_dec_create(void) +{ + if (family_id < AMDGPU_FAMILY_RV) + return; + + /* TODO */ +} + +static void amdgpu_cs_vcn_dec_decode(void) +{ + if (family_id < AMDGPU_FAMILY_RV) + return; + + /* TODO */ +} + +static void amdgpu_cs_vcn_dec_destroy(void) +{ + if (family_id < AMDGPU_FAMILY_RV) + return; + + /* TODO */ +} + +static void amdgpu_cs_vcn_enc_create(void) +{ + if (family_id < AMDGPU_FAMILY_RV) + return; + + /* TODO */ +} + +static void amdgpu_cs_vcn_enc_encode(void) +{ + if (family_id < AMDGPU_FAMILY_RV) + return; + + /* TODO */ +} + +static void amdgpu_cs_vcn_enc_destroy(void) +{ + if (family_id < AMDGPU_FAMILY_RV) + return; + + /* TODO */ +} commit 01096f2122234c48c959b5bcf451873de459bc47 Author: Leo Liu <[email protected]> Date: Mon Apr 3 14:59:15 2017 -0400 tests/amdgpu: move decode sum to common Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]> diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c index fe78326f..081ec9c2 100644 --- a/tests/amdgpu/cs_tests.c +++ b/tests/amdgpu/cs_tests.c @@ -378,7 +378,7 @@ static void amdgpu_cs_uvd_decode(void) /* TODO: use a real CRC32 */ for (i = 0, sum = 0; i < dt_size; ++i) sum += ptr[i]; - CU_ASSERT_EQUAL(sum, 0x20345d8); + CU_ASSERT_EQUAL(sum, SUM_DECODE); r = amdgpu_bo_cpu_unmap(buf_handle); CU_ASSERT_EQUAL(r, 0); diff --git a/tests/amdgpu/decode_messages.h b/tests/amdgpu/decode_messages.h index edfba3b7..c5c96f80 100644 --- a/tests/amdgpu/decode_messages.h +++ b/tests/amdgpu/decode_messages.h @@ -24,6 +24,8 @@ #ifndef _DECODE_MESSAGES_H_ #define _DECODE_MESSAGES_H_ +#define SUM_DECODE 0x20345d8 + static const uint8_t uvd_create_msg[] = { 0xe4,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x44,0x40,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x03,0x00,0x00, commit 1851f1b57a96547d5b8f8b651768561ee6927b16 Author: Leo Liu <[email protected]> Date: Mon Apr 3 14:52:15 2017 -0400 tests/amdgpu: separate decode messages AVC decode messages will be common with VCN decode Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]> diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c index 65f2434b..fe78326f 100644 --- a/tests/amdgpu/cs_tests.c +++ b/tests/amdgpu/cs_tests.c @@ -289,7 +289,8 @@ static void amdgpu_cs_uvd_decode(void) r = amdgpu_bo_cpu_map(buf_handle, (void **)&ptr); CU_ASSERT_EQUAL(r, 0); - memcpy(ptr, uvd_decode_msg, sizeof(uvd_create_msg)); + memcpy(ptr, uvd_decode_msg, sizeof(uvd_decode_msg)); + memcpy(ptr + sizeof(uvd_decode_msg), avc_decode_msg, sizeof(avc_decode_msg)); if (family_id >= AMDGPU_FAMILY_VI) { ptr[0x10] = 7; diff --git a/tests/amdgpu/decode_messages.h b/tests/amdgpu/decode_messages.h index 09abc37e..edfba3b7 100644 --- a/tests/amdgpu/decode_messages.h +++ b/tests/amdgpu/decode_messages.h @@ -356,6 +356,9 @@ static const uint8_t uvd_decode_msg[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +}; + +static const uint8_t avc_decode_msg[] = { 0x02,0x00,0x00,0x00,0x1e,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x88,0x00,0x00,0x00, 0x01,0x00,0x00,0x01,0x00,0x03,0x02,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10, commit ec65d19809121b460c80b45509ed12a4cdbde4b8 Author: Leo Liu <[email protected]> Date: Mon Apr 3 14:44:04 2017 -0400 tests/amdgpu: rename uvd messages to decode messages It will be shared with VCN decode Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]> diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c index 342815de..65f2434b 100644 --- a/tests/amdgpu/cs_tests.c +++ b/tests/amdgpu/cs_tests.c @@ -32,7 +32,7 @@ #include "util_math.h" #include "amdgpu_test.h" -#include "uvd_messages.h" +#include "decode_messages.h" #include "amdgpu_drm.h" #include "amdgpu_internal.h" diff --git a/tests/amdgpu/uvd_messages.h b/tests/amdgpu/decode_messages.h similarity index 99% rename from tests/amdgpu/uvd_messages.h rename to tests/amdgpu/decode_messages.h index 00235cbb..09abc37e 100644 --- a/tests/amdgpu/uvd_messages.h +++ b/tests/amdgpu/decode_messages.h @@ -1,5 +1,5 @@ /* - * Copyright 2014 Advanced Micro Devices, Inc. + * Copyright 2017 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -21,8 +21,8 @@ * */ -#ifndef _UVD_MESSAGES_H_ -#define _UVD_MESSAGES_H_ +#ifndef _DECODE_MESSAGES_H_ +#define _DECODE_MESSAGES_H_ static const uint8_t uvd_create_msg[] = { 0xe4,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x44,0x40,0x00,0x00,0x00,0x00, @@ -810,4 +810,4 @@ static const uint8_t uvd_it_scaling_table[] = { 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10, }; -#endif /* _UVD_MESSAGES_H_ */ +#endif /* _DECODE_MESSAGES_H_ */ ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot -- _______________________________________________ Dri-patches mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/dri-patches