RE: question about r128_driver.c
Alexander Stohr <[email protected]>
| Newsgroups | gmane.comp.xfree86.expert |
|---|---|
| Message-ID | <328A30E823B7D511A0BF00065B042A3B0115A1BF@fgl00exh01.fgl.atitech.com> |
Maybe because the generic name is R128_BIOS* and the appended number just qualifys the width of the value in bits. So you do have 2 byte and 4 byte values in the ROM BIOS structure. At least the spaces between the hexadecimal address offsets do strongly indicate this sort of the structure layout to me. -Alex. PS: i hope i hit your point. > -----Original Message----- > From: Case Jones [mailto:[email protected]] > Sent: Saturday, November 30, 2002 00:49 > To: [email protected] > Subject: [Xpert]question about r128_driver.c > > > Hello, > > In the initialization, why are pll->min_pll_freq and > pll->max_pll_freq > taken from R128_BIOS32, when pll->reference_freq, pll->reference_div, > and pll->xclk are taken from R128_BIOS16? > > Relevant code section: [...] > pll->reference_freq = R128_BIOS16(pll_info_block + 0x0e); > pll->reference_div = R128_BIOS16(pll_info_block + 0x10); > pll->min_pll_freq = R128_BIOS32(pll_info_block + 0x12); > pll->max_pll_freq = R128_BIOS32(pll_info_block + 0x16); > pll->xclk = R128_BIOS16(pll_info_block + 0x08);