Re: cross platform 64bit lock free FIFO?

> see (or vice versa), but on Intel, that can never happen.

FWIW, it can on next gen consoles though at least there are intrinsics
for inserting light weight memory barriers.

-- Daniel, Epic Games Inc.  

> -----Original Message-----
> From: [email protected] 
> [mailto:[email protected]] 
> On Behalf Of Jon Watte
> Sent: Monday, August 07, 2006 2:29 PM
> To: [email protected]
> Subject: Re: [GD-General] cross platform 64bit lock free FIFO?
> 
> More than one question in the same message.
> 
> Typically, a lock-free FIFO supports only a single writer and 
> a single 
> reader. If that's all you need, then you don't even need the special 
> instructions, because the writer will always write the same variable, 
> and the reader will always read the other same variable. If 
> your cache 
> is not 100% read-after-write coherent, then you may have a temporary 
> situation where there's something written that the reader doesn't yet 
> see (or vice versa), but on Intel, that can never happen.
> 
> If you need multiple readers, or multiple writers, then correct 
> lock-free implementation suddenly becomes a *lot* harder.
> 
> Cheers,
> 
>                 / h+
> 
> 
> Andras Balogh wrote:
> > I've found info on know how to implement a lock free FIFO on 32bit  
> > systems, but I've also read that making it work for 64bit 
> systems with the  
> > current instruction sets is very difficult and extremely 
> error prone. So I  
> > would prefer to use a proven solution, instead of trying to 
> roll my own.  
> > On Windows, it's easy, because the Win32 API provides an 
> interlocked  
> > SList, that is supposed to work on 64 bit platforms too. 
> But what about  
> > other operating systems? Also, AFAIK these new 64bit 
> systems don't really  
> > have a 64bit address space, but 40-44? Does this mean, that 
> all these  
> > 64bit implementations are doing is only using the top 20 
> bits for ABA  
> > resolution?? I'm confused :)
> >   
> 
> 
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