Re: Data oriented programming

Fabian Giesen <[email protected]> Fri, 08 Oct 2010 12:00:07 -0700
Newsgroups gmane.games.devel.sweng
Message-ID <[email protected]>
On 10/8/2010 6:52 AM, Richard wrote:
>
> In article<[email protected]>,
>      Warrick Buchanan<[email protected]>  writes:
>
>> Also I would add to that and say don't be afraid of copying data around
>> [...]
>
> The reasoning behind this being that the cache misses during copying is
> paid for by the repeated cache hits during subsequent processing?
>
> Does this assume that the data needs to be accessed more than once
> during processing?

Copying by itself is not fundamentally more (or less) efficient than any 
other pass that only does sequential reads and writes. If you actually 
have do to it manually on the CPU, then all other things being equal, 
you're better off just writing to your destination(s) directly during 
the preceding pass. There's some caveats - e.g. when accessing 
write-combined memory directly, you need to look closely at your 
generated code and make sure that it really does write sequentially with 
no holes (exact limitations vary by platform; on some processors you can 
write "slightly out of order" within cache lines with no penalty, but 
others really need writes to be at least word-sized and sequential, so 
that's what you should target). Getting a C/C++ compiler to actually do 
this properly often involves liberal use of compiler write barriers 
and/or "volatile" qualifiers. If the sequential writes cause other 
complications (or if you prefer simplicity), it can be better to use a 
small block of cached memory as "staging area" and copy from there to 
write-combined mem.

Of course, if you have a DMA engine that can quickly (and 
asynchronously) move data around memory, the copies really are "free" 
(unless you're hitting memory bandwidth limits), which affects the usage 
patterns. On the PS3, you have this and the SPUs which can't access main 
memory directly, so expect to be copying around data a lot. (On SPUs, 
the usual pattern is to DMA output data from block N-1, work on block N, 
and DMA input data for block N+1 at the same time).

-Fabian
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