Re: [PATCH RFC 1/7] ACPICA: Define PCIe P2P latency and bandwidth information
"Rafael J. Wysocki (Intel)" <[email protected]> Thu, 13 Aug 2026 12:13:39 +0200
| Newsgroups | gmane.linux.acpi.devel,gmane.linux.kernel,gmane.linux.kernel.pci |
|---|---|
| Message-ID | <CAJZ5v0iDR1LN=6QosMvNbctHKqEmzG0Jg6eS1np5MQkfLjXzAA@mail.gmail.com> |
On Wed, Aug 12, 2026 at 9:48 PM Leon Romanovsky <[email protected]> wrote: > > From: Leon Romanovsky <[email protected]> > > PCIe topology alone cannot tell an operating system whether traffic may > cross host bridges, what ordering rules it needs, or how expensive the path > is. Encoding this knowledge in chipset lists duplicates platform policy and > cannot survive a virtualized topology. > > Define HMAT Type 3 as a firmware contract for directional Generic Port P2P > paths, including separate ordered and Unordered I/O applicability. This > gives platform software a standard way to distinguish unsupported, > conditional, and usable paths. The definition follows a proposed ACPI ECN. > > Signed-off-by: Leon Romanovsky <[email protected]> > --- > include/acpi/actbl1.h | 27 ++++++++++++++++++++++++++- > 1 file changed, 26 insertions(+), 1 deletion(-) As per Documentation/driver-api/acpi/linuxized-acpica.rst, please submit a pull request with this change to the upstream ACPICA project on GitHub. The Linux patch will become applicable when there is a corresponding commit upstream. > diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h > index d824838cb7af..0fc766a8e90f 100644 > --- a/include/acpi/actbl1.h > +++ b/include/acpi/actbl1.h > @@ -2003,7 +2003,8 @@ enum acpi_hmat_type { > ACPI_HMAT_TYPE_PROXIMITY = 0, /* Memory proximity domain attributes */ > ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ > ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ > - ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ > + ACPI_HMAT_TYPE_P2P_LATENCY = 3, /* PCIe P2P latency and bandwidth information */ > + ACPI_HMAT_TYPE_RESERVED = 4 /* 4 and greater are reserved */ > }; > > struct acpi_hmat_structure { > @@ -2108,6 +2109,30 @@ struct acpi_hmat_cache { > #define ACPI_HMAT_CP_WB (1) > #define ACPI_HMAT_CP_WT (2) > > +/* 3: PCIe P2P Latency and Bandwidth Information */ > + > +struct acpi_hmat_p2p_latency { > + struct acpi_hmat_structure header; > + u8 flags; > + u8 data_type; > + u16 reserved1; > + u32 number_of_initiator_Pds; > + u32 number_of_target_Pds; > + u32 reserved2; > + u64 entry_base_unit; > +}; > + > +/* Masks for Flags field above */ > + > +#define ACPI_HMAT_P2P_NON_UIO (1) /* Bit 0: Entries apply to non-UIO traffic */ > +#define ACPI_HMAT_P2P_UIO (1<<1) /* Bit 1: Entries apply to UIO traffic */ > + > +/* > + * The data_type field reuses the ACPI_HMAT_ACCESS/READ/WRITE_LATENCY and > + * ACPI_HMAT_ACCESS/READ/WRITE_BANDWIDTH values defined for the System > + * Locality Latency and Bandwidth Information Structure above. > + */ > + > /******************************************************************************* > * > * HPET - High Precision Event Timer table > > -- > 2.55.0 >