Is there a way to enable a PCI-PCI bridge on bus 3 early?

Keith Hui <[email protected]>
Newsgroups gmane.linux.bios
Message-ID <CANTF=bQEjUeGQYdFaOFPnfgufk+L=b1NYQoty7hH=F0_F1DebA@mail.gmail.com>
In my quest to get POST codes to show on my Asus P8Z77-M, and fixing
sb/bd82x6x [1] along the way, I'm still not quite getting them.

I have a ISA/PCI POST card, but it isn't giving me anything. I bought
a little "Debug Card Expert" off Amazon that looks like a
mini-PCI/mini-PCIe cross, but in today's testing I found out that it
isn't wired properly (i.e. isn't going to work) for PCIe at all, but I
did get it to show POST codes over LPC via the TPM header. I have
another of this same little PoS that broke in half on arrival. Now
that I know it only really works over LPC and only 9 signals, I'll
attempt to repair the broken traces and glue it together.

My board has a PCI-PCI bridge on bus:device.func 3:0.0 (so bus 3, this
will be important) that services the PCI slot. After applying [1] to
have the PCH send port 80 data to PCI as I specified in Kconfig, I
still don't get any POST code... and not over LPC either, so I know my
patch works.

Now I think I may need to enable CONFIG_EARLY_PCI_BRIDGE. Problem is
the bridge has to be a device on bus 0.

How can I enable this PCI bridge on bus 3 early so a POST card sitting
on it can get codes?

Thanks
Keith

[1] https://review.coreboot.org/c/coreboot/+/79725
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