Re: Two devicetree questions and two use cases
Nicholas Chin <[email protected]>
| Newsgroups | gmane.linux.bios |
|---|---|
| Message-ID | <[email protected]> |
> Hi Keith, > >> Hi Nicholas, >> >> Thanks for the reply, and the scoop, and pardon my second email to the >> list that essentially asked the same question again. >> >> The hidden register would be a boon to my goals. I have an Asus P8Z77- >> V LE Plus board on order that I will soon be able to test the idea on, >> since it is one of those boards with more devices than PCIe lanes. It >> is part of my plan to bring coreboot to all the P8x7x boards. Towards >> that goal there are a few patches I'm looking to get in such as >> CB:82556,82557,85834, and am still looking for volunteers to boot test >> my as yet incomplete ports. >> >> Cheers >> Keith Oh, I was going to add: When you get your P8Z77-V LE Plus, I guess it would be a good idea to set the different options for that "PCI Express X16_3 Slot (Black) bandwidth" option in the vendor firmware setup menu and then dump the IFD to see if it's actually changing any soft straps. It would also be good to collect register dumps from tools like inteltool (especially the RCBA registers) and lspci to see if there's anything else that's changing. Cheers, Nicholas _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]